ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 114

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
REGISTER 12-3:
REGISTER 12-4:
DS39935C-page 112
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4
bit 3-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-7
bit 6
bit 5
bit 4-2
bit 1-0
R/W-x
R/W-0
R/W-0
R/W-0
r
r
r
r
Reserved: Write as ‘ 0 ’, ignore on read
PLRITY: TPIN+/- Polarity Status bit (applies to 10Base-T only)
1 = Wiring on the TPIN+/- pins is reversed polarity. PHY internally swaps the TPIN+/- signals to get the
0 = Wiring on the TPIN+/- is correct polarity
Reserved: Ignore on read
Reserved: Write as ‘ 0 ’, ignore on read
Reserved: Write as ‘ 1 ’
Reserved: Write as ‘ 0 ’, ignore on read
SPDDPX<2:0>: Current Operating Speed and Duplex Status bits
111 = Reserved
110 = 100 Mbps, full duplex
101 = 10 Mbps, full duplex
100 = Reserved
011 = Reserved
010 = 100 Mbps, half duplex
001 = 10 Mbps, half duplex
000 = Reserved
Reserved: Write as ‘ 0 ’, ignore on read
R/W-0
R/W-0
R/W-1
R/W-x
correct polarity.
r
r
r
r
PHSTAT2: PHY STATUS REGISTER 2
PHSTAT3: PHY STATUS REGISTER 3
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-x
r
r
r
r
SPDDPX2
PLRITY
R/W-x
R-0
R-0
R-0
r
r
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SPDDPX1
R/W-0
R/W-x
R-1
R-0
r
r
r
SPDDPX0
R/W-x
R/W-0
R-0
R-0
r
r
r
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-x
R-1
r
r
r
r
R/W-x
R/W-0
R/W-0
R-1
r
r
r
r
bit 8
bit 0
bit 8
bit 0