LAN83C185-JT SMSC, LAN83C185-JT Datasheet - Page 49
![IC PHY 10/100 3.3V LP 64-TQFP](/photos/6/81/68190/lan83c185-jt_sml.jpg)
LAN83C185-JT
Manufacturer Part Number
LAN83C185-JT
Description
IC PHY 10/100 3.3V LP 64-TQFP
Manufacturer
SMSC
Datasheet
1.LAN83C185-JT.pdf
(60 pages)
Specifications of LAN83C185-JT
Controller Type
Ethernet Controller
Interface
MII
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Supply Voltage Range
2.97V To 3.63V
Digital Ic Case Style
TQFP
No. Of Pins
64
Operating Temperature Range
0°C To +70°C
Data Rate Max
100Mbps
Supply Voltage Max
3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1009
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN83C185-JT
Manufacturer:
Standard
Quantity:
2 077
Company:
Part Number:
LAN83C185-JT
Manufacturer:
ALTERA
Quantity:
513
Company:
Part Number:
LAN83C185-JT
Manufacturer:
Microchip Technology
Quantity:
10 000
High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
SMSC LAN83C185
5.6
5.6.1
5.6.2
DSP Block
General Description
The “DSP Block” includes the following modules:
DSP Core (Equalizer, Timing and BLW correction), Testability / Configuration module (Testability /
Configuration control), Testability / Configuration Registers (not including any SMI registers) and the
Multiplexers (for the testability / configuration signals).
The details of the DSP core are described in the DSP architecture specification. The Testability /
Configuration features give access to the status and control of most of the internal registers in the DSP.
The status and control mechanisms are described in the architecture specification.
ADC Gray code converting
The LAN83C185 ADC generates a 6 bit “modified” Gray code. Normal Gray code outputs number in
the range of 0 to 2
The MLT3 analog input has a voltage range of –1V to +1V. It is necessary to translate this to -32 to
+31 on the output of the ADC. Thus the Gray Code is modified by offsetting it by -32. This is translated
to 2’s complement before being presented to the DSP.
n
– 1. The 6-bit code generates numbers from 0 to 63 (decimal).
DATASHEET
49
Revision 0.8 (06-12-08)