COM20022I3V-HT SMSC, COM20022I3V-HT Datasheet - Page 45

• Manufacturer Part Number: COM20022I3V-HT
• Description: IC CTRLR ARCNET 2KX8 RAM 48-TQFP
• Manufacturer: SMSC
• Series: ARCNETr

Specifications of COM20022I3V-HT

• Controller Type: ARCNET Controller
• Interface: Differential
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 65mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1004

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
SMSC COM20022I
BIT
BIT
1,0
3,2
7
6
5
4
1
0
Reconfiguration Timer
1, 0
16 Bit Access
Reserved
Internal Terminal
Counter Enable;
Re-Trigger mode
Terminal Count
Bit 8
Refresh Synchronous
Gate Time
DMA Transfer Mode
TC Polarity
DREQ Polarity
BIT NAME
BIT NAME
W16
ITCEN/
RTRG
TC8/
RSYN/
GTTM
DMAMD1,D
MAMD0
TCPOL
DRQPOL
RCNTM1,0
SYMBOL
SYMBOL
Table 6.12 - Bus Control Register
DATASHEET
This bit is used to Disable/Enable the 16 bit access. It influences
both CPU cycle and DMA cycle. W16= 0: Disable (Default); W16=
1: Enable
This bit is undefined.
The function of this bit is mode dependent. ITCEN is for Non-Burst
or Burst mode. RTRG is for the two Programmable-Burst modes.
ITCEN = 0: Terminate the DMA only by External TC. ITCEN = 1:
Terminate the DMA by Internal or External TC.
RTRG = 0: External Re-Trigger mode; Negated DREQ pin is Re-
asserted by falling edge of nREFEX pin. RTRG = 1: Internal Re-
Trigger mode; Negated DREQ pin is Re-asserted by timeout of
internal gate timer (350ns/750ns).
The function of this bit is mode dependent. TC8 is for Non-burst or
burst mode. RSYN and GTTM are for the two Programmable-Burst
modes. RSYN is for External Re-Trigger mode. GTTM is for internal
Re-Trigger mode.
Non-burst or burst mode:
TC8: Bit 8 (MSB) of 9 bit Terminal Count setting register. The other
8 bits are in the DMA Count register. Terminal Count setting register
is ignored when ITCEN = 0.
Programmable-Burst and External Re-Trigger mode:
RSYN = 0: DMA is started Immediately.
RSYN = 1: DMA is started after Refresh execution.
Programmable-Burst and Internal Re-Trigger mode:
GTTM = 0: Gate Time is 350nS (min)
GTTM = 1: Gate Time is 750nS (min)
These bits select the data transfer mode of the DMA. These transfer
modes influence the timing of asserting/negating the DREQ pin.
This bit sets the Active polarity of TC pin.
TCPOL = 0: Active High (Default), TCPOL = 1 Active Low
This bit sets the Active polarity of DREQ pin.
DRQPOL = 0: Active High (Default), DRQPOL = 1 Active Low
These bits are used to program the reconfiguration timer as a
function of maximum node count. These bits set the time out period
of the reconfiguration timer as shown below. The time out periods
shown are for 10 Mbps.
Note*: The node ID value 255 must exist in the network for 13.125
DMAMD1
RCNTM1
0
0
1
1
0
0
1
1
Page 45
mS timeout to be valid.
RCNTM0
DMAMD0
0
1
0
1
0
1
0
1
DESCRIPTION
DESCRIPTION
Non-Burst (Default)
Burst
Programmable-Burst by Timer
Programmable-Burst by Cycle Counter
Time Out Period
13.125 mS*
26.25 mS
52.5 mS
210 mS
Transfer Mode
Max Node Count
Up to 255 nodes
Up to 64 nodes
Up to 32 nodes
Up to 16 nodes
Revision 09-27-07