AT83C26-ZTUL Atmel, AT83C26-ZTUL Datasheet - Page 51

• Manufacturer Part Number: AT83C26-ZTUL
• Description: IC SMART CARD READER 1/PM 48-QFN
• Manufacturer: Atmel

Specifications of AT83C26-ZTUL

• Controller Type: Smart Card Reader Interface
• Interface: 2-Wire
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 65mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• For Use With: AT89STK-09 - EVAL BOARD FOR AT83C26
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 30. SC4_CFG2 ()
7511D–SCR–02/07
Bit Number
ART4
2-0
7
7
6
5
4
3
Bit Mnemonic
CARDRST4
CARDCK4
CKSTOP4
CKS4[2:0]
ART4
6
X
X
Reset value = 0x 0X00 1000
Notes:
1. When CKS4 value is changed a special logic insures no glitch occurs on the CCLK4 pin and
2. CCLK4 must be stopped with CKSTOP4 bit before switching from CKS4 = (0, 1, 2, 3, 6, 7) to
Description
Automatic Reset Transition
Set this bit to have the CRST4 pin changed according to activation sequence.
Clear this bit to have the CRST4 pin immediately following the value programmed in CARDRST4.
Card Reset
Set this bit to enter a reset sequence according to ART4 bit value.
Clear this bit to drive a low level on the CRST4 pin.
Card Clock
Set this bit to set a high level on the CCLK4 pin (according to CKSTOP4 bit value).
Clear this bit to drive a low level on the CCLK4 pin.
CARD Clock Stop
Set this bit to stop CCLK4 according to CARDCK4. This can be used to set asynchronous cards in power-
down mode (GSM) or to drive CCLK4 by software.
Clear this bit to have CCLK4 running according to CKS4. This can be used to activate asynchronous cards.
Note:
Interface 4Card Clock Selection
CKS4 [2:0] = 0: CCLK4 = CLK (then the maximum frequency is 24 MHz)
CKS4 [3:0] = 1: CCLK4 = DCCLK
CKS4 [3:0] = 2: CCLK4 = DCCLK / 2
CKS4 [3:0] = 3: CCLK4 = DCCLK / 4
CKS4 [3:0] = 4: CCLK4 = A2
CKS4 [3:0] = 5: CCLK4 = A2 / 2
CKS4 [3:0] = 6: CCLK4 = CLK / 2
CKS4 [3:0] = 7: CCLK4 = CLK / 4
The reset value is 0.
CARDRST4
actual configuration changes can be delayed by half a period to two periods of CCLK4.
CKS4 = (4, 5) or vice versa.
5
When this bit is changed a special logic ensures that no glitch occurs on the CCLK4 pin and actual
configuration changes can be delayed by half a period to two periods of CCLK4.
CARDCK4
4
CKSTOP4
3
CKS42
2
CKS41
1
AT83C26
CKS40
0
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