ENC28J60-I/SS Microchip Technology, ENC28J60-I/SS Datasheet - Page 46
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ENC28J60-I/SS
Manufacturer Part Number
ENC28J60-I/SS
Description
IC ETHERNET CTRLR W/SPI 28SSOP
Manufacturer
Microchip Technology
Datasheet
1.ENC28J60SS.pdf
(98 pages)
Specifications of ENC28J60-I/SS
Package / Case
28-SSOP
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
2.25 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Supply Current (max)
180 mA
Package
28SSOP
Standard Supported
IEEE 802.3
Communication Mode
Full Duplex|Half Duplex
Network Interface
MII|MIIM
Data Rate
10 Mbps
Host Interface
SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ENC28J60-I/SS
Manufacturer:
MURATA
Quantity:
30 000
ENC28J60
TABLE 7-3:
7.2.3
To process the packet, the host controller will normally
use the RBM SPI command and start reading from the
beginning of the next Packet Pointer. The host controller
will save the next Packet Pointer, any necessary bytes
from the receive status vector and then proceed to read
the actual packet contents. If ECON2.AUTOINC is set, it
will be able to sequentially read the entire packet without
ever modifying the ERDPT registers. The Read Pointer
would automatically wrap at the end of the circular
receive buffer to the beginning.
EXAMPLE 7-1:
DS39662C-page 44
15-0
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
if Packet Start Address + Offset > ERXND, then
else
Zero
Receive VLAN Type Detected
Receive Unknown Opcode
Receive Pause Control Frame
Receive Control Frame
Dribble Nibble
Receive Broadcast Packet
Receive Multicast Packet
Received Ok
Length Out of Range
Length Check Error
CRC Error
Reserved
Carrier Event Previously Seen
Reserved
Long Event/Drop Event
Received Byte Count
READING RECEIVED PACKETS
ERDPT = Packet Start Address + Offset – (ERXND – ERXST + 1)
ERDPT = Packet Start Address + Offset
RECEIVE STATUS VECTORS
Field
RANDOM ACCESS ADDRESS CALCULATION
0
Current frame was recognized as a VLAN tagged frame.
Current frame was recognized as a control frame but it contained an
unknown opcode.
Current frame was recognized as a control frame containing a valid pause
frame opcode and a valid destination address.
Current frame was recognized as a control frame for having a valid
type/length designating it as a control frame.
Indicates that after the end of this packet, an additional 1 to 7 bits were
received. The extra bits were thrown away.
Indicates packet received had a valid Broadcast address.
Indicates packet received had a valid Multicast address.
Indicates that at the packet had a valid CRC and no symbol errors.
Indicates that frame type/length field was larger than 1500 bytes (type field).
Indicates that frame length field value in the packet does not match the
actual data byte length and specifies a valid length.
Indicates that frame CRC field value does not match the CRC calculated
by the MAC.
Indicates that at some time since the last receive, a carrier event was
detected. The carrier event is not associated with this packet. A carrier
event is activity on the receive channel that does not result in a packet
receive attempt being made.
Indicates a packet over 50,000 bit times occurred or that a packet was
dropped since the last receive.
Indicates length of the received frame. This includes the destination
address, source address, type/length, data, padding and CRC fields. This
field is stored in little-endian format.
Preliminary
In the event that the application needed to do random
access to the packet, it would be necessary to manu-
ally calculate the proper ERDPT, taking care to not
exceed the end of the receive buffer if the packet spans
the ERXND-to-ERXST buffer boundary. In other words,
given the packet start address and a desired offset, the
application
Example 7-1.
Description
should
follow
© 2008 Microchip Technology Inc.
the
logic
shown
in