LTC4269CDKD-1#PBF Linear Technology, LTC4269CDKD-1#PBF Datasheet - Page 28

IC PD/OPTO FLYBACK CTRLR 32-DFN

LTC4269CDKD-1#PBF

Manufacturer Part Number
LTC4269CDKD-1#PBF
Description
IC PD/OPTO FLYBACK CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet

Specifications of LTC4269CDKD-1#PBF

Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Input Voltage
60V
Supply Current
6.4mA
Digital Ic Case Style
DFN
No. Of Pins
32
Duty Cycle (%)
88%
Frequency
100kHz
Operating Temperature Range
0°C To +70°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
32
Mounting
Surface Mount
Package Type
DFN EP
Case Length
7mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPLICATIONS INFORMATION
LTC4269-1
Selecting the Load Compensation Resistor
The expression for R
section as:
Continuing the example:
This value for R
methods are required for producing the best results.
This is because several of the required input variables
are diffi cult to estimate precisely. For instance, the ESR
term above includes that of the transformer secondary,
but its effective ESR value depends on high frequency
behavior, not simply DC winding resistance. Similarly, K1
appears as a simple ratio of V
but theoretically estimating effi ciency is not a simple
calculation.
The suggested empirical method is as follows:
1. Build a prototype of the desired supply including the
2. Temporarily ground the C
3. Calculate a value for the K1 constant based on V
28
actual secondary components.
compensation function. Measure output voltage while
sweeping output current over the expected range.
Approximate the voltage variation as a straight line.
and the measured effi ciency.
R
If ESR + R
CMP
K1=
DC=
R
ΔV
CMP
OUT
= K1•
⎝ ⎜
1+
V
= 0.116 •
= 3.25k
/ΔI
IN
V
N•V
DS(ON)
OUT
OUT
• Eff
R
CMP
V
ESR + R
1
IN(NOM)
SENSE
OUT
= R
⎠ ⎟
is a good starting point, but empirical
= 8mΩ
=
33mΩ • 1− 0.455
CMP
S(OUT)
48 • 90%
• 1− DC
(
DS(ON)
=
was derived in the Operation
5
1+
8mΩ
CMP
.
IN
(
8
1
1
to V
)
= 0.116
• R1• N
pin to disable the load
48
5
OUT
= 45.5%
times effi ciency,
)
SF
• 37.4kΩ •
IN
, V
3
1
OUT
4. Compute:
5. Verify this result by connecting a resistor of this value
6. Disconnect the ground short to C
Setting Frequency
The switching frequency of the LTC4269-1 is set by an
external capacitor connected between the OSC pin and
ground. Recommended values are between 200pF and
33pF , yielding switching frequencies between 50kHz and
250kHz. Figure 12 shows the nominal relationship between
external capacitance and switching frequency. Place the
capacitor as close as possible to the IC and minimize OSC
from the R
fi lter capacitor to ground. Measure the output imped-
ance R
in place. R
Fine tuning is accomplished experimentally by slightly
altering R
where R′
resistor. R
in place and R
load compensation (from step 2).
R
′ R
CMP
CMP
S(OUT)
C MP
Figure 12. f
300
200
100
= K1•
= R
CMP
S(OUT)CMP
50
CMP
S(OUT)
is the new value for the load compensation
= ΔV
CMP
. A revised estimate for R
S(OUT)
30
pin to ground.
R
R
S(OUT)
OUT
SENSE
should have decreased signifi cantly.
• 1+
OSC
is the output impedance with R
/ΔI
is the output impedance with no
vs OSC Capacitor Values
R
OUT
C
• R1• N
OSC
S(OUT)CMP
R
S(OUT)
(pF)
with the new compensation
100
CMP
SF
and connect a 0.1μF
CMP
42691 F12
200
is:
42691fb
CMP

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