TDA8034AT/C1,118 NXP Semiconductors, TDA8034AT/C1,118 Datasheet - Page 6

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TDA8034AT/C1,118

Manufacturer Part Number
TDA8034AT/C1,118
Description
IC SMART CARD INTERFACE 16SOIC
Manufacturer
NXP Semiconductors
Type
Smart Card Interfacer
Datasheet

Specifications of TDA8034AT/C1,118

Package / Case
16-SOIC (3.9mm Width)
Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
3V, 5V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935289276118
NXP Semiconductors
TDA8034T_TDA8034AT
Product data sheet
8.3 Clock circuits
The voltage supervisor monitors the voltage of the V
Power-On Reset (POR) and supply drop-out detection during a card session. The
supervisor threshold voltages for V
than V
has reached a level higher than V
The output of the supervisor is sent to a digital controller in order to reset the
TDA8034T/TDA8034AT. This defined reset pulse of approximately 8 ms, i.e. (t
1
voltage power on; see
V
Remark: f
parameter.
The clock signal from pin CLK to the card is either supplied by an external clock signal
connected to pin XTAL1 or generated using a crystal connected between pins XTAL1 and
XTAL2. The TDA8034T/TDA8034AT automatically detects if an external clock is
connected to XTAL1, eliminating the need for a separate pin to select the clock source.
Automatic clock source detection is performed on each activation command (falling edge
of the signal on pin CMDVCCN). The presence of an external clock on pin XTAL1 is
checked during a time window defined by the internal oscillator. If a clock is detected, the
internal crystal oscillator is stopped. If a clock is not detected, the internal crystal oscillator
is started. When an external clock is used, it is mandatory that the clock is applied to pin
XTAL1 before the falling edge of the signal on pin CMDVCCN.
Fig 4.
DDP
fosc(int)low
(internal signal)
falls below V
th
+ V
V
ALARMN
Voltage supervisor waveforms
th
osc(int)low
), is used internally to maintain the IC in the Shutdown mode during the supply
+ V
hys
V
V
hys
DD
, the IC remains inactive irrespective of the command line levels. After V
th
All information provided in this document is subject to legal disclaimers.
th
is the low frequency (or inactive) mode of the defined f
.
Rev. 3.0. — 17 January 2011
Figure
power on
4. A deactivation sequence is performed when either V
th
DDP
+ V
t
w
and V
hys
TDA8034T; TDA8034AT
, the IC remains inactive for the duration of t
DD
are set internally. As long as V
DDP
supply dropout
and V
t
w
DD
supplies providing both
Smart card interface
© NXP B.V. 2011. All rights reserved.
osc(int)
power off
001aak993
w
DD
= 1024 ×
is less
6 of 29
DD
w
DD
or
.

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