UJA1075TW/3V3/WD,1 NXP Semiconductors, UJA1075TW/3V3/WD,1 Datasheet - Page 42

• Manufacturer Part Number: UJA1075TW/3V3/WD,1
• Description: IC SBC CAN/LIN HS 3.3V 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1075TW/3V3/WD,1

• Controller Type: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 4.5 V ~ 28 V
• Current - Supply: 83µA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 11.
T
are defined with respect to ground; positive currents flow in the IC; typical values are given at V
specified.
[1]
[2]
[3]
[4]
[5]
[6]
UJA1075_2
Product data sheet
Symbol
δ3
δ4
t
t
t
t
t
Wake bias output; pin WBIAS
t
t
Watchdog
t
t
Oscillator
f
PD(RX)r
PD(RX)f
PD(RX)sym
wake(busdom)min
to(dom)TXDL
WBIASL
cy
trig(wd)1
trig(wd)2
osc
vj
=
Bus load conditions are: C
t
A system reset will be performed if the watchdog is in Window mode and is triggered less than t
period (or in the first half of the watchdog period).
The nominal watchdog period is programmed via the NWP control bits in the WD_and_Status register (see
Window mode only.
δ1 δ3
δ2 δ4
−
PD(RX)sym
40 °C to +150
,
,
=
=
Dynamic characteristics
= t
t
-------------------------------
t
------------------------------- -
bus rec
bus rec
PD(RX)r
2 t
2 t
(
(
Parameter
duty cycle 3
duty cycle 4
rising receiver propagation
delay
falling receiver propagation
delay
receiver propagation delay
symmetry
minimum bus dominant
wake-up time
TXDL dominant time-out
time
WBIAS LOW time
cycle time
watchdog trigger time 1
watchdog trigger time 2
oscillator frequency
×
×
°
) min
bit
) max
bit
C; V
(
(
− t
PD(RX)f
)
BAT
)
. Variable t
. Variable t
L
= 1 nF and R
= 4.5 V to 28 V; V
.
bus(rec)(min)
bus(rec)(max)
…continued
L
= 1 kΩ; C
All information provided in this document is subject to legal disclaimers.
is illustrated in the LIN timing diagram in
is illustrated in the LIN timing diagram in
BAT
V
V
Normal mode
Normal, Standby and Sleep modes
Conditions
V
t
V
V
t
V
V
V
V
V
V
C
V
C
V
C
LIN online mode; V
WBC = 1
WBC = 0
watchdog Window mode only
watchdog Window mode only
bit
bit
th(rec)RX(max)
th(dom)RX(max)
th(rec)RX(max)
th(dom)RX(max)
th(rec)RX(min)
th(dom)RX(min)
BAT
th(rec)RX(min)
th(dom)RX(min)
BAT
BAT
BAT
BAT
RXDL
RXDL
RXDL
> V
L
= 96 μs; V
= 96 μs; V
Rev. 02 — 27 May 2010
= 6.8 nF and R
= 7.6 V to 18 V; LSC = 1
= 6.1 V to 7.6V; LSC = 1
= 5.5 V to 18 V; R
= 5.5 V to 18 V; R
= 5.5 V to 18 V; R
V1
= 20 pF
= 20 pF
= 20 pF
; V
BAT
BAT
BAT
= 0.389V
= 0.378V
= 0.778V
= 0.797V
= 0.251V
= 0.242V
> V
= 0.616V
= 0.630V
= 5.5 V to 7 V; LSC = 1
= 7 V to 18 V; LSC = 1
L
V2
= 660 Ω; C
TXDL
; R
BAT
BAT
LIN
BAT
BAT
RXDL
RXDL
RXDL
High-speed CAN/LIN core system basis chip
BAT;
BAT
BAT
BAT
= 0 V
= 500
; t
t
bit
= 2.4 kΩ
= 2.4 kΩ
= 2.4 kΩ
bit
L
= 10 nF and R
= 96 μs
= 96 μs
Ω
Figure
; R
Figure
(CANH- CANL)
18.
18.
trig(wd)1
[1]
[2]
[1]
[2]
[2]
[3]
[2]
[3]
[4]
[5]
[7]
L
= 500 Ω.
Min
0.417
0.417
-
-
-
-
−2
28
20
227
58.1
14.5
0.45 ×
NWP
0.9 ×
NWP
460.8
BAT
after the start of the watchdog
= 45
= 14 V; unless otherwise
[6]
[6]
Table
Ω
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
512
UJA1075
© NXP B.V. 2010. All rights reserved.
to 65
4); valid in watchdog
Max
-
-
0.590
0.590
6
6
+2
104
80
278
71.2
17.8
0.555 ×
NWP
1.11 ×
NWP
563.2
Ω
; all voltages
[6]
[6]
42 of 53
Unit
μs
μs
μs
μs
ms
μs
ms
ms
ms
ms
kHz