ISP1583BSGA ST-Ericsson Inc, ISP1583BSGA Datasheet - Page 32
ISP1583BSGA
Manufacturer Part Number
ISP1583BSGA
Description
IC USB CTRL HI-SPEED 64HVQFN
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1583BSUM.pdf
(100 pages)
Specifications of ISP1583BSGA
Controller Type
USB Peripheral Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1583BS-S
ISP1583BS-S
ISP1583BS-S
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NXP Semiconductors
Table 22.
ISP1583_7
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
9.2.1 Address register (address: 00h)
9.2.2 Mode register (address: 0Ch)
unchanged
9.2 Initialization registers
DEVEN
R/W
7
0
Remark: Write zero to all reserved bits, unless otherwise specified.
This register sets the USB assigned address and enables the USB device.
shows the Address register bit allocation.
Bits DEVADDR[6:0] will be cleared whenever a bus reset, a power-on reset or a soft reset
occurs. Bit DEVEN will be cleared whenever a power-on reset or a soft reset occurs.
In response to standard USB request SET_ADDRESS, the firmware must write the
(enabled) device address to the Address register, followed by sending an empty packet to
the host. The new device address is activated when the device receives an
acknowledgment from the host for the empty packet token.
Table 23.
This register consists of 2 bytes (bit allocation: see
The Mode register controls resume, suspend and wake-up behavior, interrupt activity, soft
reset, clock signals and SoftConnect operation.
Bit
7
6 to 0
•
•
•
•
•
•
Buffer Length
Buffer Status
Control Function
Data Port
Endpoint MaxPacketSize
Endpoint Type
R/W
6
0
0
Symbol
DEVEN
DEVADDR[6:0] Device Address: This field specifies the USB device address.
Address register: bit description
R/W
Rev. 07 — 22 September 2008
5
0
0
Description
Device Enable: Logic 1 enables the device. The device will not
respond to the host, unless this bit is set.
R/W
4
0
0
DEVADDR[6:0]
R/W
3
0
0
Table
Hi-Speed USB peripheral controller
R/W
24).
2
0
0
R/W
1
0
0
© NXP B.V. 2008. All rights reserved.
ISP1583
Table 22
R/W
0
0
0
31 of 99
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