ISP1181ABSUM ST-Ericsson Inc, ISP1181ABSUM Datasheet

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ISP1181ABSUM

Manufacturer Part Number
ISP1181ABSUM
Description
IC USB HOST CTRL FULL-SPD 48HVQF
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1181ABSUM

Controller Type
USB Peripheral Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
26mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1181ABS-T
ISP1181ABS-T
Dear customer,
As from August 2
ST-NXP Wireless.
As a result, the following changes are applicable to the attached document.
If you have any questions related to the document, please contact our nearest sales office.
Thank you for your cooperation and understanding.
ST-NXP Wireless
Company name - Philips Semiconductors is replaced with ST-NXP Wireless.
Copyright - the copyright notice at the bottom of each page “© Koninklijke Philips
Electronics N.V. 200x. All rights reserved”, shall now read: “© ST-NXP Wireless 200x -
All rights reserved”.
Web site -
http://www.stnwireless.com
Contact information - the list of sales offices previously obtained by sending an email
to sales.addresses@www.semiconductors.philips.com, is now found at
http://www.stnwireless.com
http://www.semiconductors.philips.com
nd
2008, the wireless operations of NXP have moved to a new company,
IMPORTANT NOTICE
under Contacts.
is replaced with
www.stnwireless.com

ISP1181ABSUM Summary of contents

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IMPORTANT NOTICE Dear customer from August 2 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless result, the following changes are applicable to the attached document. ● Company name - Philips ...

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General description The ISP1181A is a Universal Serial Bus (USB) peripheral controller that complies with Universal Serial Bus Specification Rev. 2.0 , supporting data transfer at full-speed (12 Mbit/s). It provides full-speed USB communication capacity to microcontroller or microprocessor-based ...

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Philips Semiconductors 3. Applications 4. Ordering information Table 1: Ordering information Type number Package Name ISP1181ADGG TSSOP48 ISP1181ABS HVQFN48 9397 750 13959 Product data Clock output with programmable frequency ( MHz) Complies with the ACPI™, OnNow™ and USB ...

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USB V BUS sense input to LED 3.3 V HUB GoodLink 1.5 k SoftConnect ANALOG Tx/Rx 44 RESET POWER-ON internal reset RESET 1 VOLTAGE V CC 3.3 V REGULATOR ...

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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration TSSOP48. 9397 750 13959 Product data Full-speed USB peripheral controller REGGND 2 V reg(3. BUS WAKEUP 8 ...

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Philips Semiconductors Fig 3. Pin configuration HVQFN48. 6.2 Pin description Table 2: Symbol V CC REGGND V reg(3. BUS GL WAKEUP SUSPEND 9397 750 13959 Product data BUS_CONF0 12 TEST3 11 INT 10 9 TEST2 TEST1 8 ...

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Philips Semiconductors Table 2: Symbol EOT DREQ DACK TEST1 TEST2 INT TEST3 BUS_CONF0 BUS_CONF1 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 GND V ref DATA9 DATA8 DATA7 DATA6 9397 750 13959 Product data Pin description …continued [1] Pin TSSOP48 HVQFN48 10 ...

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Philips Semiconductors Table 2: Symbol DATA5 DATA4 DATA3 DATA2 DATA1 GND V CC(3.3) AD0 ALE CS RESET CLKOUT 9397 750 13959 Product data Pin description …continued [1] Pin TSSOP48 HVQFN48 ...

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Philips Semiconductors Table 2: Symbol GND XTAL2 XTAL1 [1] 9397 750 13959 Product data Pin description …continued [1] Pin TSSOP48 HVQFN48 Symbol names with an overscore (for example, NAME) represent active LOW signals. Rev. ...

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Philips Semiconductors 7. Functional description The ISP1181A is a full-speed USB peripheral controller with configurable endpoints. It has a fast general-purpose parallel interface for communication with many types of microcontrollers or microprocessors. It supports different bus configurations ...

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Philips Semiconductors V BUS Without V With V there is noise on the (D+, D-) lines not taken into account. This ensures that the peripheral remains in the suspend state. Remark: Note that the tolerance of the internal ...

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Philips Semiconductors 8. Modes of operation The ISP1181A has four bus configuration modes, selected via pins BUS_CONF1 and BUS_CONF0: Mode 0 Mode 1 Mode 2 Mode 3 The bus configurations for each of these modes are given in circuits for ...

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Philips Semiconductors Table 4: Endpoint access and programmability Endpoint FIFO size (bytes) identifi (fixed (fixed) 1 programmable 2 programmable 3 programmable 4 programmable 5 programmable 6 programmable 7 programmable 8 programmable 9 programmable 10 programmable 11 ...

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Philips Semiconductors Table 5: FFOSZ[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Each programmable FIFO can be configured independently via its ECR, but the total physical size of all enabled endpoints ...

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Philips Semiconductors 9.3 Endpoint initialization In response to the standard USB request, Set Interface, the firmware must program all 16 ECRs of the ISP1181A in sequence (see enabled or not. The hardware will then automatically allocate FIFO storage space. If ...

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Philips Semiconductors 10. DMA transfer Direct Memory Access (DMA method to transfer data from one location to another in a computer system, without intervention of the central processor (CPU). Many different implementations of DMA exist. The ISP1181A supports ...

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Philips Semiconductors Table 7: 10.2 8237 compatible mode The 8237 compatible DMA mode is selected by clearing bit DAKOLY in the Hardware Configuration Register (see Table Table 8: Symbol DREQ DACK EOT RD WR The DMA subsystem of an IBM ...

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Philips Semiconductors The following example shows the steps which occur in a typical DMA transfer: 1. ISP1181A receives a data packet in one of its endpoint FIFOs; the packet must 2. ISP1181A asserts the DREQ signal requesting the 8237 for ...

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Philips Semiconductors In DACK-only mode the ISP1181A uses the DACK signal as data strobe. Input signals RD and WR are ignored. This mode is used in CPU systems that have a single address space for memory and I/O access. Such ...

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Philips Semiconductors Short packet: before any DMA transfer takes place. When a short packet has been enabled as EOT indicator (SHORTP = 1), the transfer size is determined by the presence of a short packet in the data. This mechanism ...

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Philips Semiconductors 11. Suspend and resume 11.1 Suspend conditions The ISP1181A detects a USB suspend status when a constant idle state is present on the USB bus for more than 3 ms. The bus-powered devices that are suspended must not ...

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Philips Semiconductors A USB BUS INT_N GOSUSP WAKEUP SUSPEND Fig 6. Suspend and resume timing. In Figure • A: indicates the point at which the USB bus enters the idle state. • B: indicates resume condition, which can be a ...

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Philips Semiconductors Fig 7. SUSPEND and WAKEUP signals in a powered-off modem application. 11.2 Resume conditions A wake-up from the suspend state is initiated either by the USB host or by the application: • USB host: drives a K-state on ...

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Philips Semiconductors Table 12: Register Interrupt Enable IESUSP Mode Hardware Configuration Unlock 12. Commands and registers The functions and registers of ISP1181A are accessed via commands, which consist of a command code followed by optional data bytes (read or write ...

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Philips Semiconductors Table 13: Command and register summary Name Read Control IN Configuration Read Endpoint n Configuration ( 14) Write/Read Device Address Write/Read Mode Register Write/Read Hardware Configuration Hardware Configuration Register Write/Read Interrupt Enable Register Write/Read DMA ...

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Philips Semiconductors Table 13: Command and register summary Name Unstall Endpoint 14) [7] Check Control OUT Status [7] Check Control IN Status Check Endpoint n Status [ 14) Acknowledge Setup General ...

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Philips Semiconductors Remark: If any change is made to an endpoint configuration which affects the allocated memory (size, enable/disable), the FIFO memory contents of all endpoints becomes invalid. Therefore, all valid data must be removed from enabled endpoints before changing ...

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Philips Semiconductors Table 17: Bit 12.1.3 Write/Read Mode Register This command is used to access the ISP1181A Mode Register, which consists of 1 byte (bit allocation: see The Mode Register controls the DMA bus width, resume ...

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Philips Semiconductors 12.1.4 Write/Read Hardware Configuration This command is used to access the Hardware Configuration Register, which consists of 2 bytes. The first (lower) byte contains the device configuration and control values, the second (upper) byte holds the clock control ...

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Philips Semiconductors Table 21: Bit 12.1.5 Write/Read Interrupt Enable Register This command is used to individually enable/disable interrupts from all endpoints, as well as interrupts caused by events on the USB bus (SOF, ...

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Philips Semiconductors Bit 7 Symbol reserved Reset 0 Access R/W R/W Table 23: Bit 12.1.6 Write/Read DMA Configuration This command defines the DMA configuration ...

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Philips Semiconductors Table 25: Bit 12.1.7 Write/Read DMA Counter This command accesses the DMA Counter Register, which consists of 2 bytes. The bit allocation is given in ...

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Philips Semiconductors Table 27: Bit 12.1.8 Reset Device This command resets the ISP1181A in the same way as an external hardware reset via input RESET. All registers are initialized to their ‘reset’ values. Code ...

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Philips Semiconductors Table 28: Byte # (8-bit bus … (N Table 29 … Table 30 … Remark: There is no protection against writing ...

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Philips Semiconductors Transaction — read 1 byte Table 31: Endpoint Status Register: bit allocation Bit 7 Symbol EPSTAL EPFULL1 Reset 0 Access R Table 32: Bit 12.2.3 Stall Endpoint/Unstall Endpoint These commands ...

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Philips Semiconductors 12.2.4 Validate Endpoint Buffer This command signals the presence of valid data for transmission to the USB host, by setting the Buffer Full flag of the selected IN endpoint. This indicates that the data in the buffer is ...

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Philips Semiconductors Table 34: Bit 12.2.7 Acknowledge Setup This command acknowledges to the host that a SETUP packet was received. The arrival of a SETUP packet disables the Validate Buffer and Clear Buffer commands for the ...

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Philips Semiconductors Table 36: Bit Table 37: Error code (Binary) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 12.3.2 Unlock Device This command unlocks the ISP1181A from ...

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Philips Semiconductors Bit 7 Symbol Reset 0 Access W Table 39: Bit 12.3.3 Write/Read Scratch Register This command accesses the 16-bit Scratch Register, which can be used by the firmware to save and restore information, for example, ...

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Philips Semiconductors Code (Hex): B4 — read frame number Transaction — read bytes Table 42: Frame Number Register: bit allocation Bit 15 Symbol [1] Reset 0 Access R Bit 7 Symbol [1] Reset 0 Access R [1] ...

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Philips Semiconductors Bit 7 Symbol Reset Access R Table 47: Bit 12.3.6 Read Interrupt Register This command indicates the sources of interrupts as stored in the 4-byte Interrupt Register. Each individual endpoint has its ...

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Philips Semiconductors Table 49: Bit 13. Interrupts Figure 8 is logged in a status bit of the Interrupt Register. Corresponding bits in the Interrupt Enable Register determine whether or not an ...

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Philips Semiconductors interrupt register RESET SUSPND RESUME . SOF . . EP14 .. . EP0IN EP0OUT EOT interrupt enable register IERST IESUSP IERESM . . IESOF . IEP14 .. . IEP0IN IEP0OUT IEEOT Fig 8. Interrupt logic. Bits RESET, RESUME, ...

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Philips Semiconductors 14. Power supply The ISP1181A is powered from a single supply voltage, ranging from 4 5 integrated voltage regulator provides a 3.3 V supply voltage for the internal logic and the USB transceiver. This ...

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Philips Semiconductors hardware configuration register CLKRUN SUSPEND . . . CLKDIV [ 3 NOLAZY Fig 12. Oscillator and LazyClock logic. When ISP1181A enters ‘suspend’ state (by setting and clearing bit GOSUSP in the Mode Register), outputs ...

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Philips Semiconductors 16. Power-on reset The ISP1181A has an internal power-on reset (POR) circuit. Input pin RESET can be directly connected to V power-on and normally requires stabilize. The triggering voltage of the POR circuit ...

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Philips Semiconductors 17. Limiting values Table 50: Absolute maximum ratings In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V input voltage I I latch-up current latchup V electrostatic discharge voltage esd T ...

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Philips Semiconductors 19. Static characteristics Table 52: Static characteristics; supply pins unless otherwise specified. GND amb Symbol Parameter V regulated supply voltage reg(3.3) I operating supply current CC I ...

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Philips Semiconductors Table 54: Static characteristics: analog I/O pins ( 3 5 Symbol Parameter Input levels V differential input sensitivity DI V differential common mode CM ...

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Philips Semiconductors 20. Dynamic characteristics Table 55: Dynamic characteristics Symbol Parameter Reset t pulse width on input RESET W(RESET) Crystal oscillator f crystal frequency XTAL [1] Dependent ...

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Philips Semiconductors T PERIOD 3.3 V differential data lines the bit duration corresponding with the USB data rate. PERIOD Full-speed timing symbols have a subscript prefix ‘F’, low-speed timings a prefix ‘L’. Fig 15. Source differential ...

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Philips Semiconductors 20.1 Parallel I/O timing Table 57: Dynamic characteristics: parallel interface timing Symbol Parameter Read timing (see Figure 18) t address hold time after RD RHAX HIGH t address setup time before RD AVRL LOW t data outputs high-impedance ...

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Philips Semiconductors A0 CS/DACK RD t RLDV DATA (1) For t , both CS and RD must be de-asserted. SHRL Fig 18. Parallel interface read timing (I/O and 8237 compatible DMA). A0 CS/DACK t WLWH WR t DVWH DATA (1) ...

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Philips Semiconductors ALE AD0 DATA Fig 20. ALE timing. 20.2 Access cycle timing Table 58: Dynamic characteristics: access cycle timing Symbol Parameter Write command + write data (see T cycle time for write command, cy(WC-WD) then write data T cycle ...

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Philips Semiconductors DATA (1) Example: read data. Fig 22. Write data + write command cycle timing. DATA Fig 23. Write command + read data cycle timing. DATA (1) Example: read data. ...

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Philips Semiconductors 20.3 DMA timing: single-cycle mode Table 59: Dynamic characteristics: single-cycle DMA timing Symbol Parameter 8237 compatible mode (see Figure t DREQ off after DACK on ASRP T cycle time signal DREQ cy(DREQ) Read in DACK-only mode (see Figure ...

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Philips Semiconductors DREQ DACK DATA Fig 26. DMA read timing in DACK-only mode. DREQ DACK DATA Fig 27. DMA write timing in DACK-only mode. DREQ DACK RD/WR (2) EOT (1) t starts from DACK or RD/WR going LOW, whichever occurs ...

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Philips Semiconductors 20.4 DMA timing: burst mode Table 60: Dynamic characteristics: burst mode DMA timing Symbol Parameter Burst (see Figure 29) t input RD/WR HIGH after DREQ on RSIH t DREQ off after input RD/WR LOW ILRP t DACK off ...

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Philips Semiconductors DREQ DACK RD/WR EOT (1) The EOT condition is considered valid if DACK, RD/WR and EOT are all active (= LOW). Fig 30. EOT timing in burst mode DMA. 9397 750 13959 Product data Full-speed USB peripheral controller ...

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Philips Semiconductors 21. Application information 21.1 Typical interface circuits D10 D11 D12 H8S/2357 D13 D14 D15 CSn RD WR IRQ P1.1 DREQ0 DACK TEND (1) Use of a 470 ...

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Philips Semiconductors AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 ALE PSEN 8051 RD WR IRQ P2.3 P2.0 P2.1 BUS_REQ BUS_GNT MCU_WR MCU_RD CS1 CS2 RD WR DREQ DACK EOT DMA CONTROLLER ...

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Philips Semiconductors 21.2 Interfacing ISP1181A with an H8S/2357 microcontroller This section gives a summary of the ISP1181A interface with a H8S/2357 (or compatible) microcontroller. Aspects discussed are: interrupt handling, address mapping, DMA and I/O port usage for suspend and remote ...

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Philips Semiconductors 21.2.4 Using H8S/2357 I/O Ports In the interface circuit of general purpose output port. This pin drives the ISP1181A’s WAKEUP input to generate a remote wake-up. The H8S/2357 has 3 registers to configure port 1: Port 1 Data ...

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Philips Semiconductors 23. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. ...

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Philips Semiconductors HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm ...

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Philips Semiconductors 24. Soldering 24.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

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Philips Semiconductors • • During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive ...

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Philips Semiconductors [3] [4] [5] [6] [7] [8] [9] 9397 750 13959 Product data These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected ...

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Philips Semiconductors 25. Revision history Table 62: Revision history Rev Date CPCN Description 05 20041208 200412002 Product data (9397 750 13959) Modifications: 04 20020716 - Product data (9397 750 09613) 03 20020108 - Product data (9397 750 09007) 02 20010919 ...

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Philips Semiconductors 26. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . ...

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