ISP1181ABSUM ST-Ericsson Inc, ISP1181ABSUM Datasheet - Page 62

• Manufacturer Part Number: ISP1181ABSUM
• Description: IC USB HOST CTRL FULL-SPD 48HVQF
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1181ABSUM

• Controller Type: USB Peripheral Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 26mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1181ABS-T; ISP1181ABS-T

Philips Semiconductors
9397 750 13959
Product data
21.2.1 Interrupt handling
21.2.2 Address mapping in H8S/2357
21.2.3 Using DMA
21.2 Interfacing ISP1181A with an H8S/2357 microcontroller
This section gives a summary of the ISP1181A interface with a H8S/2357 (or
compatible) microcontroller. Aspects discussed are: interrupt handling, address
mapping, DMA and I/O port usage for suspend and remote wake-up control. A typical
interface circuit is shown in
The H8S/2357 bus controller partitions its 16 Mbyte address space into eight areas
(0 to 7) of 2 Mbyte each. The bus controller will activate one of the outputs CS0 to
CS7 when external address space for the associated area is accessed.
The ISP1181A can be mapped to any address area, allowing easy interfacing when
the ISP1181A is the only peripheral in that area. If in the example circuit for bus
configuration mode 0 (see
(in area 7), output CS7 of the H8S/2357 can be directly connected to input CS of the
ISP1181A.
The external bus specifications, bus width, number of access states and number of
program wait states can be programmed for each address area. The recommended
settings of H8S/2357 for interfacing the ISP1181A are:
The ISP1181A can be configured for several methods of DMA with the H8S/2357 and
other devices. The interface circuit in
working with the H8S/2357 in single-address DACK-only DMA mode. External
devices are not shown.
For single-address DACK-only mode, firmware must program the following settings:
•
•
•
•
•
•
ISP1181A: program the Hardware Configuration register to select an active LOW
level for output INT (INTPOL = 0, see
H8S/2357: program the IRQ Sense Control Register (ISCRH and ISCRL) to
specify low-level sensing for the IRQ input.
8-bit bus in Bus Width Control Register (ABWCR)
enable wait states in Access State Control Register (ASTCR)
1 program wait state in the Wait Control Register (WCRH and WCRL).
ISP1181A:
– program the DMA Counter register with the total transfer byte count
– program the Hardware Configuration Register to select active level LOW for
– select the target endpoint and transfer direction
– select DACK-only mode and enable DMA transfer.
DREQ and DACK
Rev. 05 — 08 December 2004
Figure
Figure
31) the ISP1181A is mapped to address FFFF08H
31.
Figure 31
Table
Full-speed USB peripheral controller
20)
shows an example of the ISP1181A
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1181A
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