ISP1161A1BMUM ST-Ericsson Inc, ISP1161A1BMUM Datasheet - Page 51
![no-image](/images/manufacturer_photos/0/6/627/st-ericsson_inc_sml.jpg)
ISP1161A1BMUM
Manufacturer Part Number
ISP1161A1BMUM
Description
IC USB HOST CONTROLLER 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1161A1BMGA.pdf
(137 pages)
Specifications of ISP1161A1BMUM
Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1161A1BM-T
ISP1161A1BM-T
ISP1161A1BM-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1161A1BMUM
Manufacturer:
LUMEX
Quantity:
12 000
Company:
Part Number:
ISP1161A1BMUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
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Philips Semiconductors
Table 16:
9397 750 13961
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcInterruptEnable register: bit allocation
reserved
R/W
R/W
MIE
31
23
15
0
7
0
Writing a logic 1 to a bit in this register sets the corresponding bit, whereas writing a
logic 0 to a bit in this register leaves the corresponding bit unchanged. On a read, the
current value of this register is returned.
Code (Hex): 04 — read
Code (Hex): 84 — write
Table 17:
Bit
31
30 to 7
6
5
4
3
2
1
0
RHSC
R/W
R/W
30
22
14
0
6
0
HcInterruptEnable register: bit description
Symbol
MIE
-
RHSC
FNO
UE
RD
SF
-
SO
FNO
R/W
R/W
29
21
13
0
5
0
Rev. 03 — 23 December 2004
Description
MasterInterruptEnable by the HCD: A logic 0 is ignored by
the HC. A logic 1 enables interrupt generation by events specified
in other bits of this register.
reserved
0 — ignore
1 — enable interrupt generation due to Root Hub Status Change
0 — ignore
1 — enable interrupt generation due to Frame Number Overflow
0 — ignore
1 — enable interrupt generation due to Unrecoverable Error
0 — ignore
1 — enable interrupt generation due to Resume Detect
0 — ignore
1 — enable interrupt generation due to Start of Frame
reserved
0 — ignore
1 — enable interrupt generation due to Scheduling Overrun
R/W
R/W
UE
28
20
12
0
4
0
reserved
reserved
R/W
R/W
00H
00H
reserved
USB single-chip host and device controller
R/W
R/W
RD
27
19
11
0
3
0
R/W
R/W
SF
26
18
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A1
reserved
R/W
R/W
25
17
0
9
1
0
R/W
R/W
SO
50 of 136
24
16
0
8
0
0
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