TMC2072-MT SMSC, TMC2072-MT Datasheet - Page 73

• Manufacturer Part Number: TMC2072-MT
• Description: IC CTRLR CIRC 100-TQFP DUAL MODE
• Manufacturer: SMSC
• Series: CircLink™r

Specifications of TMC2072-MT

• Controller Type: I/O Controller
• Interface: Transceiver
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1023

Peripheral Mode CircLink™ Controller
Datasheet
NOTE:
SMSC TMC2072
*1: Not equivalent to the ARCNET original specifications.
(Reduction the number of bits and function modifications)
Do not write to this register.
- When reading: ARCNET NEXT ID register
NEXTID [4:0] ( bit 4 to 0)
It is possible for the node to read out value of the node ID that will send the token. In CircLink, the following
ID value is fixed to the ID value of the node + 1. In case of no response after sending token to the node of
ID value equaling to the node ID + 1 (absent receiver) and the token is passed to another node, the
NXTIDERR bit of the diagnostic register will be set to 1.
*1 Not equivalent to the ARCNET original specifications. (Reduction function )
*2 Not equivalent to the ARCNET original specifications. (Change initial value)
*3 Not equivalent to the ARCNET original specifications. (Addition of new function)
- When reading/writing: ARCNET Setup2 Register
FARB (bit 6)
Increases the speed of the RAM Access controller. In default setting, it sets the yes/no setting of temporary
relay reception of 128 byte/page during CKP=000 setting. For further details, please refer to section 2.9.1 -
Temporary Receive and Direct Receive.
0: 128-byte/page temporary relay reception denied (Default)
1: 128-byte/page temporary relay reception allowed
*1
*1
*3
*1
*1
*1
*2
COMR7-0011
[READ ONLY]
COMR7-0100
[READ/WRITE]
RAM Access controller input clock has a single-sided function.
RAM Access controller input clock has a double-sided function. Accordingly, the input clock must
be below 20 MHz.
15-5
15-8
4-0
5,4
1-0
bit
bit
7
6
3
2
(Next ID Register)
name
--------
NEXTID4-0
(Setup2 Register)
Name
--------
--------
FARB
--------
--------
--------
RCNTM1-0
DATASHEET
init. value
init. value
all "0"
0,0
1,1
0
0
0
0
1
1
Page 73
description
reserved (all "0")
Next Node ID
description
reserved (all "0")
reserved ("0")
reserved ("0")
reserved (all "0")
reserved ("0")
reserved ("0")
Reconfiguration (RECON) Timer 1,0
SUBAD=0011
SUBAD=0100
address:0Eh
address:0Eh
Revision 0.1 (06-07-07)