DS21Q42T Maxim Integrated Products, DS21Q42T Datasheet - Page 15

• Manufacturer Part Number: DS21Q42T
• Description: IC FRAMER ENHANCED T1 4X 128TQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q42T

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS21Q42
3. DS21Q42 PIN FUNCTION DESCRIPTION
TRANSMIT SIDE PINS
Signal Name: TCLK
Signal Description: Transmit Clock
Signal Type: Input
A 1.544 MHz primary clock. Used to clock data through the transmit side formatter.
Signal Name: TSER
Signal Description: Transmit Serial Data
Signal Type: Input
Transmit NRZ serial data. Sampled on the falling edge of TCLK when the transmit side elastic store is
disabled. Sampled on the falling edge of TSYSCLK when the transmit side elastic store is enabled.
Signal Name: TCHCLK
Signal Description: Transmit Channel Clock
Signal Type: Output
A 192 kHz clock which pulses high during the LSB of each channel. Synchronous with TCLK when the
transmit side elastic store is disabled. Synchronous with TSYSCLK when the transmit side elastic store
is enabled. Useful for parallel to serial conversion of channel data. This function is available when FMS
= 1 (DS21Q41 emulation).
Signal Name: TCHBLK
Signal Description: Transmit Channel Block
Signal Type: Output
A user programmable output that can be forced high or low during any of the 24 T1 channels.
Synchronous with TCLK when the transmit side elastic store is disabled. Synchronous with TSYSCLK
when the transmit side elastic store is enabled. Useful for blocking clocks to a serial UART or LAPD
controller in applications where not all T1 channels are used such as Fractional T1, 384 Kbps service, 768
Kbps or ISDN–PRI . Also useful for locating individual channels in drop–and–insert applications, for
external per–channel loopback, and for per–channel conditioning. See Section 12 for details.
Signal Name: TSYSCLK
Signal Description: Transmit System Clock
Signal Type: Input
1.544 MHz or 2.048 MHz clock. Only used when the transmit side elastic store function is enabled.
Should be tied low in applications that do not use the transmit side elastic store. Can be burst at rates up
to 8.192 MHz.
Signal Name: TLCLK
Signal Description: Transmit Link Clock
Signal Type: Output
4 kHz or 2 kHz (ZBTSI) demand clock for the TLINK input. See Section 15 for details.
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