DS21Q42T Maxim Integrated Products, DS21Q42T Datasheet - Page 2

• Manufacturer Part Number: DS21Q42T
• Description: IC FRAMER ENHANCED T1 4X 128TQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q42T

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

1. INTRODUCTION
The DS21Q42 is a superset version of the popular DS21Q41 quad T1 framer offering the new features
listed below. All of the original features of the DS21Q41 have been retained and software created for the
original device is transferable to the DS21Q42.
NEW FEATURES
· Additional hardware signaling capability including:
· Full HDLC controller with 64-byte buffers in both transmit and receive paths. Configurable for FDL
· Per-channel code insertion in both transmit and receive paths
· Ability to monitor one DS0 channel in both the transmit and receive paths
· RCL, RLOS, RRA, and RAIS alarms now interrupt on change of state
· Detects AIS-CI
· 8.192 MHz clock synthesizer
· Per–channel loopback
· Ability to calculate and check CRC6 according to the Japanese standard
· Ability to pass the F–Bit position through the elastic stores in the 2.048 MHz backplane mode
· IEEE 1149.1 support
FEATURES
· Four T1 DS1/ISDN–PRI/J1 framing transceivers
· All four framers are fully independent
· Frames to D4, ESF, and SLC–96 R formats
· Each of the four framers contain dual two–frame elastic store slip buffers that can connect to
· 8–bit parallel control port that can be used directly on either multiplexed or non–multiplexed buses
· Extracts and inserts robbed bit signaling
· Detects and generates yellow (RAI) and blue (AIS) alarms
· Programmable output clocks for Fractional T1
· Fully independent transmit and receive functionality
· Generates and detects in–band loop codes from 1 to 8 bits in length including CSU loop codes
· Contains ANSI one’s density monitor and enforcer
· Large path and line error counters including BPV, CV, CRC6, and framing bit errors
· Pin compatible with DS21Q44 E1 Enhanced Quad E1 Framer
· 3.3V-supply with 5V tolerant I/O; low power CMOS
· Available in 128–pin TQFP package
– Receive signaling re-insertion to a backplane multiframe sync
– Availability of signaling in a separate PCM data stream
– Signaling freezing
– Interrupt generated on change of signaling data
or DS0 access
asynchronous backplanes up to 8.192 MHz
(Intel or Motorola)
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