DP83902AVLJ National Semiconductor, DP83902AVLJ Datasheet - Page 56
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DP83902AVLJ
Manufacturer Part Number
DP83902AVLJ
Description
IC CTRLR SER NETWORK IN 100PQFP
Manufacturer
National Semiconductor
Datasheet
1.DP83902AVJGNOPB.pdf
(70 pages)
Specifications of DP83902AVLJ
Controller Type
Serial Network Interface Controller
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
140mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83902AVLJ
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Manufacturer
Quantity
Price
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NS
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15 0 Switching Characteristics
Note 1 BACK must be setup before T1 after BREQ is asserted Missed setup will slip the beginning of the DMA by four bus clocks The Bus Latency will influence
the allowable FIFO threshold
Note 2 During remote DMA transfers only a single bus transfer is performed During local DMA operations burst mode transfers are performed
Note 3 These limits include the RC delay inherent in our test method These signals typically turn off within 15 ns enabling other devices to drive these lines with
no contention
Symbol
brqhl
brqhr
brql
backs
bccte
bcctr
Bus Clock to Bus Request High for Local DMA
Bus Clock to Bus Request High for Remote DMA
Bus Request Low from Bus Clock
Acknowledge Setup to Bus Clock (Note 1)
Bus Clock to Control Enable
Bus Clock to Control Release (Notes 2 3)
Parameter
DMA Control Bus Arbitration
AC Specs DP83902A Note All Timing is Preliminary (Continued)
56
Min
2
Max
50
45
60
60
70
TL F 11157 – 37
Units
ns
ns
ns
ns
ns
ns