CY7C68001-56LTXC Cypress Semiconductor Corp, CY7C68001-56LTXC Datasheet - Page 3

• Manufacturer Part Number: CY7C68001-56LTXC
• Description: IC USB EZ-USB SX2 HS 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USBr

Specifications of CY7C68001-56LTXC

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2932

Document #: 38-08013 Rev. *B
7.2 FLAGSAB/FLAGSCD Registers 0x02/0x03 ........................................................................... 22
7.3 POLAR Register 0x04 ............................................................................................................. 23
7.4 REVID Register 0x05 ............................................................................................................... 24
7.5 EPxCFG Register 0x06–0x09 ................................................................................................. 24
7.6 EPxPKTLENH/L Registers 0x0A–0x11 .................................................................................. 25
7.7 EPxPFH/L Registers 0x12–0x19 ............................................................................................ 26
7.8 EPxISOINPKTS Registers 0x1A–0x1D ................................................................................. 27
7.9 EPxxFLAGS Registers 0x1E–0x1F ........................................................................................ 27
7.10 INPKTEND/FLUSH Register 0x20 ........................................................................................ 28
7.11 USBFRAMEH/L Registers 0x2A, 0x2B ................................................................................ 28
7.12 MICROFRAME Registers 0x2C ............................................................................................ 29
7.13 FNADDR Register 0x2D ........................................................................................................ 29
7.14 INTENABLE Register 0x2E ................................................................................................... 29
7.1.4 Bit 4: IFCLKPOL ............................................................................................................................ 22
7.1.5 Bit 3: ASYNC .................................................................................................................................. 22
7.1.6 Bit 2: STANDBY ............................................................................................................................. 22
7.1.7 Bit 1: FLAGD/CS# .......................................................................................................................... 22
7.1.8 Bit 0: DISCON ................................................................................................................................ 22
7.3.1 Bit 7: WUPOL ................................................................................................................................. 23
7.3.2 Bit 5: PKTEND ............................................................................................................................... 23
7.3.3 Bit 4: SLOE .................................................................................................................................... 24
7.3.4 Bit 3: SLRD .................................................................................................................................... 24
7.3.5 SLWR Bit 2 ..................................................................................................................................... 24
7.3.6 EF Bit 1 ........................................................................................................................................... 24
7.3.7 FF Bit 0 ........................................................................................................................................... 24
7.5.1 Bit 7: VALID ...................................................................................................................................24
7.5.2 Bit 6: DIR ........................................................................................................................................ 24
7.5.3 Bit [5,4]: TYPE1, TYPE0 ................................................................................................................ 24
7.5.4 Bit 3: SIZE ...................................................................................................................................... 25
7.5.5 Bit 2: STALL ...................................................................................................................................25
7.5.6 Bit [1,0]: BUF1, BUF0 .................................................................................................................... 25
7.6.1 Bit 7: INFM1 EPxPKTLENH.7 ........................................................................................................ 26
7.6.2 Bit 6: OEP1 EPxPKTLENH.6 ......................................................................................................... 26
7.6.3 Bit 5: ZEROLEN EPxPKTLENH.5 ................................................................................................. 26
7.6.4 Bit 4: WORDWIDE EPxPKTLENH.4 ..............................................................................................26
7.6.5 Bit [2..0]: PL[X:0] Packet Length Bits .......................................................................................... 26
7.7.1 DECIS EPxPFH.7 ........................................................................................................................... 26
7.7.2 PKSTAT EPxPFH.6 ........................................................................................................................26
7.7.3 IN:PKTS(2:0)/OUT:PFC[12:10] EPxPFH[5:3] ............................................................................... 27
7.9.1 EPxPF Bit 6, Bit 2 .......................................................................................................................... 28
7.9.2 EPxEF Bit 5, Bit 1 .......................................................................................................................... 28
7.9.3 EPxFF Bit 4, Bit 0 .......................................................................................................................... 28
7.14.1 SETUP Bit 7 ................................................................................................................................. 29
7.14.2 EP0BUF Bit 6 ............................................................................................................................... 29
7.14.3 FLAGS Bit 5 ................................................................................................................................. 29
7.14.4 ENUMOK Bit 2 ............................................................................................................................. 29
7.14.5 BUSACTIVITY Bit 1 ..................................................................................................................... 29
7.14.6 READY Bit 0 ................................................................................................................................. 29
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CY7C68001
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