LAN8700C-AEZG SMSC, LAN8700C-AEZG Datasheet - Page 78

TXRX ETHERNET 10/100 36-QFN

LAN8700C-AEZG

Manufacturer Part Number
LAN8700C-AEZG
Description
TXRX ETHERNET 10/100 36-QFN
Manufacturer
SMSC
Type
Transceiverr
Datasheet

Specifications of LAN8700C-AEZG

Protocol
MII, RMII
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
36-QFN
Product
Ethernet Transceivers
Number Of Transceivers
1
Standard Supported
IEEE 802.3ab
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
39 mA, 81.6 mA
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1046
638-1046-1
638-1046-1

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Chapter 10 Revision History
Revision 2.2 (12-04-09)
REVISION LEVEL
(12-04-09)
(03-06-09)
(07-15-08)
(03-18-08)
(03-18-08)
(03-18-08)
(03-18-08)
(03-18-08)
(03-18-08)
(03-18-08)
(03-18-08)
& DATE
Rev. 2.2
Rev. 2.1
Rev. 2.0
Rev. 1.9
Rev. 1.9
Rev. 1.9
Rev. 1.9
Rev. 1.9
Rev. 1.9
Rev. 1.9
Rev. 1.9
Table 6.1, "SMI Timing Values"
Section 5.4.6
Table 5.34
Section 6.3
Section 5.4.8
Section 4.6.3
Section 6.6
Figure 1.1
Section 4.11
Table 5.45
Table 5.28
Chapter 9, Package Outline, Tape
and Reel
Figure 6.7, "100M RMII Transmit
Timing Diagram"
Table 6.5, "10M MII Transmit Timing
Values"
Figure 6.5, "10M MII Transmit Timing
Diagrams"
Table 6.3, "100M MII Transmit
Timing Values"
Figure 6.3, "100M MII Transmit
Timing Diagram"
Table 6.11, "Reset Timing Values"
Table 6.4, "10M MII Receive Timing
Values"
Section 4.6.2.1, "Reference Clock"
SECTION/FIGURE/ENTRY
Table 10.1 Customer Revision History
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR
DATASHEET
78
Updated T1.2 maximum to 300ns
Removed reference to internal POR system.
Added note the nRST should be low until VDDIO
and VDD_CORE are stable. Added Figure.
Corrected bit value for Asymmetric and Symmetric
PAUSE.
Improved timing values.
Enhanced this section.
Added information about register bit 18.14.
Added section on clock, with crystal specification
table.
Removed GPIO from the LED block.
Removed reference to GP01 pin in third paragraph.
Renamed Bits 7-9 as Reserved.
Renamed Bits 7-9 as Reserved.
Tape and reel drawings and ordering info added.
Replaced figure
Removed the text “T5.2” in the “Parameter” column
Replaced figure
Removed the text “T3.2” in the “Parameter” column
Replaced figure
Changed the MIN value for T11.3:
From: “400”
To: “10”
Deleted last row in table
First sentence of second paragraph changed:
From: “between 35% and 65%”
To: “between 40% and 60%”
CORRECTION
SMSC LAN8700/LAN8700i
®
Technology in a Small Footprint
Datasheet

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