PIC24FJ64GA004-I/PT Microchip Technology Inc., PIC24FJ64GA004-I/PT Datasheet - Page 218

• Manufacturer Part Number: PIC24FJ64GA004-I/PT
• Description: MCU, 16-Bit, 44-Pin, 64KB Flash, 8KB RAM, 35 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA004-I/PT

• A/d Inputs: 13 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 35
• Number Of Pins: 44
• Package Type: 44-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC24FJ64GA004 FAMILY
TABLE 25-1:
DS39881B-page 216
#text
(text)
[text]
{ }
<n:m>
.b
.d
.S
.w
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
PC
Slit10
Slit16
Slit6
Wb
Wd
Wdo
Wm,Wn
Wn
Wnd
Wns
WREG
Ws
Wso
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
4-bit bit selection field (used in word addressed instructions) ∈ {0...15}
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Field does not require an entry, may be blank
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
Absolute address, label or expression (resolved by the linker)
File register address ∈ {0000h...1FFFh}
1-bit unsigned literal ∈ {0,1}
4-bit unsigned literal ∈ {0...15}
5-bit unsigned literal ∈ {0...31}
8-bit unsigned literal ∈ {0...255}
10-bit unsigned literal ∈ {0...255} for Byte mode, {0:1023} for Word mode
14-bit unsigned literal ∈ {0...16384}
16-bit unsigned literal ∈ {0...65535}
23-bit unsigned literal ∈ {0...8388608}; LSB must be ‘0’
Program Counter
10-bit signed literal ∈ {-512...511}
16-bit signed literal ∈ {-32768...32767}
6-bit signed literal ∈ {-16...16}
Base W register ∈ {W0..W15}
Destination W register ∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }
Destination W register ∈
{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }
Dividend, Divisor working register pair (direct addressing)
One of 16 working registers ∈ {W0..W15}
One of 16 destination working registers ∈ {W0..W15}
One of 16 source working registers ∈ {W0..W15}
W0 (working register used in file register instructions)
Source W register ∈ { Ws, [Ws], [Ws++], [Ws--], [++Ws], [--Ws] }
Source W register ∈ { Wns, [Wns], [Wns++], [Wns--], [++Wns], [--Wns], [Wns+Wb] }
Preliminary
Description
© 2007 Microchip Technology Inc.