PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 20

• Manufacturer Part Number: PIC16F913-I/SP
• Description: 28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F913-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F917/916/914/913
TABLE 2-2:
DS41250E-page 18
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note
Addr
INDF
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
TRISC
TRISD
TRISE
PCLATH
INTCON
PIE1
PIE2
PCON
OSCCON
OSCTUNE
ANSEL
PR2
SSPADD
SSPSTAT
WPUB
IOCB
CMCON1
TXSTA
SPBRG
CMCON0
VRCON
ADRESL
ADCON1
1:
2:
3:
4:
5:
Name
—
—
- = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
PIC16F914/917 only.
PIC16F914/917 only, forced ‘0’ on PIC16F913/916.
The value of the OSTS bit is dependent on the value of the Configuration Word (CONFIG) of the device. See Section 4.0 “Clock
Sources”.
Bit is read-only; TRISE = 1 always.
(2)
PIC16F917/916/914/913 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Addressing this location uses contents of FSR to address data memory (not a physical
register)
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Timer2 Period Register
Synchronous Serial Port (I
Unimplemented
Unimplemented
A/D Result Register Low Byte
SPBRG7
ANS7
TRISA7
TRISB7
TRISC7
TRISD7
WPUB7
C2OUT
OSFIE
IOCB7
RBPU
CSRC
VREN
EEIE
Bit 7
SMP
GIE
IRP
—
—
—
—
—
—
—
(3)
SPBRG6
INTEDG
TRISC6
TRISD6
ANS6
WPUB6
TRISA6
TRISB6
C1OUT
ADCS2
IOCB6
IRCF2
ADIE
Bit 6
PEIE
C2IE
CKE
RP1
TX9
—
—
—
—
—
—
(3)
SPBRG5
TRISA5
TRISB5
TRISC5
TRISD5
ANS5
WPUB5
ADCS1
IOCB5
C2INV
IRCF1
TXEN
T0CS
RCIE
Bit 5
T0IE
C1IE
VRR
RP0
2
D/A
—
—
—
—
—
C mode) Address Register
(3)
Write Buffer for the upper 5 bits of the Program Counter
SBOREN
SPBRG4
TRISC4
TRISD4
WPUB4
TRISA4
TRISB4
ADCS0
LCDIE
IRCF0
IOCB4
C1INV
SYNC
TUN4
ANS4
T0SE
Bit 4
INTE
TXIE
TO
—
—
—
P
Preliminary
TRISE3
SPBRG3
TRISC3
TRISD3
OSTS
WPUB3
TRISA3
TRISB3
SSPIE
TUN3
ANS3
Bit 3
RBIE
PSA
VR3
CIS
PD
—
—
—
—
—
—
S
(4)
(5)
TRISE2
SPBRG2
TRISA2
TRISB2
TRISC2
TRISD2
CCP1IE
WPUB2
LVDIE
BRGH
TUN2
ANS2
Bit 2
CM2
T0IF
HTS
R/W
VR2
PS2
—
—
—
—
Z
(2)
TRISE1
SPBRG1
TMR2IE
TRISA1
TRISB1
TRISC1
TRISD1
WPUB1
T1GSS
TRMT
TUN1
ANS1
INTF
Bit 1
POR
CM1
PS1
VR1
LTS
DC
UA
—
—
—
(2)
TRISE0
C2SYNC
SPBRG0
TMR1IE
TRISA0
TRISB0
TRISC0
TRISD0
CCP2IE
WPUB0
TUN0
ANS0
TX9D
RBIF
Bit 0
BOR
CM0
SCS
VR0
PS0
© 2005 Microchip Technology Inc.
BF
—
—
C
(2)
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
1111 1111
1111 1111
---- 1111
---0 0000
0000 000x
0000 0000
0000 -0-0
---1 --qq
-110 q000
---0 0000
1111 1111
1111 1111
0000 0000
0000 0000
1111 1111
0000 ----
---- --10
0000 -010
0000 0000
0000 0000
0-0- 0000
xxxx xxxx
-000 ----
POR/BOR
Value on
Reset
—
—
xxxx xxxx
1111 1111
0000 0000
000q quuu
uuuu uuuu
1111 1111
1111 1111
1111 1111
1111 1111
---- 1111
---0 0000
0000 000x
0000 0000
0000 -0-0
---u --uu
-110 x000
---u uuuu
1111 1111
1111 1111
0000 0000
0000 0000
1111 1111
0000 ----
---- --10
0000 -010
0000 0000
0000 0000
0-0- 0000
uuuu uuuu
-000 ---
Resets
Value on
all other
—
—
(1)