PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 74
PIC16F913-I/SP
Manufacturer Part Number
PIC16F913-I/SP
Description
28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F913-ISP.pdf
(272 pages)
Specifications of PIC16F913-I/SP
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F913-I/SP
Manufacturer:
TI
Quantity:
212
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PIC16F917/916/914/913
TABLE 4-1:
DS41250E-page 72
LFIOSC
HFIOSC
XT or HS
LP
LP with T1OSC
enabled
EC, RC
EC, RC
System Clock
Source
OSCILLATOR DELAY EXAMPLES
125 kHz-8 MHz
Frequency
4-20 MHz
0-20 MHz
0-20 MHz
31 kHz
32 kHz
32 kHz
INTOSC or Sleep
INTOSC or Sleep
Switching From
LFIOSC
Sleep
Sleep
Sleep
Sleep
Preliminary
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a wake-up from Sleep mode,
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a switch from a LFIOSC or
1024 clock cycles
1024 clock cycles
Oscillator Delay
(T
OST
)
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
Following a change from INTOSC, an
OST of 1024 cycles must occur.
Following a change from INTOSC, an
OST of 1024 cycles must occur. See
Section 4.3.1.1 “Special Case” for
special case conditions.
an internal delay is invoked to allow the
memory bias to stabilize before
program execution can begin. See
Section 4.3.1.1 “Special Case” for
details about this special case.
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
© 2005 Microchip Technology Inc.
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