PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 215

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PIC16F913-I/SP

Manufacturer Part Number
PIC16F913-I/SP
Description
28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F913-I/SP

A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F913-I/SP
Manufacturer:
TI
Quantity:
212
RLF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2005 Microchip Technology Inc.
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Rotate Right f through Carry
[ label ]
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the right through
the Carry Flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is placed
back in register ‘f’.
Rotate Left f through Carry
[ label ]
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the left through
the Carry Flag. If ‘d’ is ‘0’, the
result is placed in the W register. If
‘d’ is ‘1’, the result is stored back in
register ‘f’.
1
1
Before Instruction
After Instruction
RLF
f
[0,1]
00
f
[0,1]
127
C
127
C
RRF f,d
REG1
C
REG1
W
C
RLF
REG1,0
1101
Register f
Register f
f,d
=
=
=
=
=
dfff
1110 0110
0
1110 0110
1100 1100
1
ffff
Preliminary
PIC16F917/916/914/913
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
Subtract W from f
[ label ] SUBWF f,d
0
d
(f) - (W)
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Subtract W from Literal
[ label ] SUBLW k
0
k - (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The power-down Status bit, PD is
cleared. Time-out Status bit, TO
is set. Watchdog Timer and its
prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
f
k
[0,1]
127
WDT prescaler,
TO,
PD
255
WDT,
W)
destination)
DS41250E-page 213

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