PIC16F1939-I/PT Microchip Technology Inc., PIC16F1939-I/PT Datasheet - Page 75

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PIC16F1939-I/PT

Manufacturer Part Number
PIC16F1939-I/PT
Description
44 TQFP 10x10x1mm TRAY, 28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1939-I/PT

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Temperature Range
–40 to 125 °C
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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5.2.2.6
The Internal Oscillator Block can be used with the 4X
PLL associated with the External Oscillator Block to
produce a 32 MHz internal system clock source. The
following settings are required to use the 32 MHz inter-
nal clock source:
• The FOSC bits in Configuration Word 1 must be
• The IRCF bits in the OSCCON register must be
• The SPLLEN bit in the OSCCON register must be
 2009 Microchip Technology Inc.
set to use the INTOSC source as the device sys-
tem clock (FOSC<2:0> = 100).
set to the 8 MHz HFINTOSC selection
(IRCF<3:0> = 1110).
set to enable the 4X PLL.
Note:
The 4X PLL may also be enabled for use
with the Internal Oscillator Block by
programming
Configuration Word 2 to a ‘1’. However,
the 4X PLL cannot be disabled by
software and the 8 MHz HFINTOSC
option will no longer be available.
32 MHz Internal Oscillator
Frequency Selection
the
PLLEN
bit
Preliminary
in
5.2.2.7
When switching between the HFINTOSC, MFINTOSC
and the LFINTOSC, the new oscillator may already be
shut down to save power (see Figure 5-7). If this is the
case, there is a delay after the IRCF<3:0> bits of the
OSCCON register are modified before the frequency
selection takes place. The OSCSTAT register will
reflect the current active status of the HFINTOSC,
MFINTOSC and LFINTOSC oscillators. The sequence
of a frequency selection is as follows:
1.
2.
3.
4.
5.
6.
7.
See Figure 5-7 for more details.
If the internal oscillator speed is switched between two
clocks of the same source, there is no start-up delay
before the new frequency is selected. Clock switching
time delays are shown in Table 5-1.
Start-up delay specifications are located in the
oscillator
Specifications”.
PIC16F193X/LF193X
IRCF<3:0> bits of the OSCCON register are
modified.
If the new clock is shut down, a clock start-up
delay is started.
Clock switch circuitry waits for a falling edge of
the current clock.
The current clock is held low and the clock
switch circuitry waits for a rising edge in the new
clock.
The new clock is now active.
The OSCSTAT register is updated as required.
Clock switch is complete.
tables
Internal Oscillator Clock Switch
Timing
of
Section 29.0
DS41364D-page 75
“Electrical

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