ISP1506BBS-S ST-Ericsson Inc, ISP1506BBS-S Datasheet - Page 17

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ISP1506BBS-S

Manufacturer Part Number
ISP1506BBS-S
Description
IC ULPI TRANSCEIVER 24-HVQFN
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet

Specifications of ISP1506BBS-S

Number Of Drivers/receivers
1/1
Protocol
USB 2.0
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 6.
ISP1506A_ISP1506B_1
Product data sheet
Signal
TX_ENABLE
DAT
SE0
INT
Signal mapping for 3-pin serial mode
8.1.3 3-pin full-speed or low-speed serial mode
8.2 USB and OTG state transitions
Maps to
DATA0
DATA1
DATA2
DATA3
If the link requires a 3-pin serial interface to transmit and receive full-speed or low-speed
USB data, it can set the ISP1506 to 3-pin serial mode. In 3-pin serial mode, the data bus
definition changes to that shown in
3PIN_FSLS_SERIAL bit in the Interface Control register to logic 1. To exit 3-pin serial
mode, the link asserts STP. This is primarily provided for links that contain legacy
full-speed or low-speed functionality, providing a more cost-effective upgrade path to
high-speed. An interrupt pin is also provided to inform the link of USB events. If the link
requires CLOCK to be running during 3-pin serial mode, the CLOCK_SUSPENDM
register bit must be set to logic 1.
For more information on 3-pin serial mode enter and exit protocols, refer to
Low Pin Interface (ULPI) Specification Rev.
A Hi-Speed USB host or an OTG device handles more than one electrical state as defined
in
to the USB 2.0 Specification Rev.
through register bit settings of XCVRSELECT[1:0], TERMSELECT, OPMODE[1:0],
DP_PULLDOWN and DM_PULLDOWN.
Table 7
resistor settings as also given in
The link is responsible for setting the desired USB and OTG states.
Ref. 1 “Universal Serial Bus Specification Rev. 2.0”
RPU_DP_EN enables the 1.5 k pull-up resistor on DP
RPD_DP_EN enables the 15 k pull-down resistor on DP
RPD_DM_EN enables the 15 k pull-down resistor on DM
HSTERM_EN enables the 45
summarizes operating states. The values of register settings in
Direction
I
I/O
I/O
O
Description
active HIGH transmit enable
transmit differential data on DP and DM when TX_ENABLE is HIGH
receive differential data from DP and DM when TX_ENABLE is LOW
transmit single-ended zero on DP and DM when TX_ENABLE is HIGH
receive single-ended zero from DP and DM when TX_ENABLE is LOW
active HIGH interrupt indication; will be asserted whenever any
unmasked interrupt occurs
Rev. 01 — 30 May 2007
Table
1.2”. The ISP1506 accommodates the various states
Table
termination resistors on DP and DM
7. Resistor setting signals are defined as follows:
6. To enter 3-pin serial mode, the link sets the
1.1”.
ISP1506A; ISP1506B
and
ULPI HS USB OTG transceiver
Ref. 2 “On-The-Go Supplement
© NXP B.V. 2007. All rights reserved.
Table 7
Ref. 3 “UTMI+
will force
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