ICS1893Y-10LF IDT, Integrated Device Technology Inc, ICS1893Y-10LF Datasheet - Page 36
ICS1893Y-10LF
Manufacturer Part Number
ICS1893Y-10LF
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Specifications of ICS1893Y-10LF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
1893Y-10LF
800-1935-5
ICS1893Y-10LF
800-1935-5
ICS1893Y-10LF
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5.7 Configuration Interface
ICS1893Y-10 Rev F 1/20/04
The following Configuration and Status Interface pins allow the ICS1893Y-10 to be completely configured
and controlled in hardware mode:
•
•
•
•
•
•
•
•
These pins allow the ICS1893Y-10 to accommodate the following:
•
•
•
•
In addition to the ISO/IEC-specified, MII control signals, the ICS1893Y-10 provides RXTRI, which is a
tri-state enable pin for the MII receive data path. When this pin is active (that is, a logic one), the following
pins are tri-stated:
•
•
•
•
Functionally, the RXTRI pin affects the MII receive channel in the same way as the Control Register’s
isolate bit, bit 0.10. (The isolate bit also affects the transmit data path.) The ICS1893Y-10 can tri-state these
seven signals for all five types of MAC/Repeater Interface configurations, not just the MII interface.
10/100SEL
ANSEL
DPXSEL
HW/SW
MII/SI
NOD/REP
RESETn
RXTRI
10M or 100M operations
Four MAC/Repeater Interface configurations:
Node or repeater applications
Full-duplex or half-duplex data links
RXCLK
RXD[3:0]
RXDV
RXER
– 10M MII
– 100M MII
– 100M Symbol
– 10M Serial
ICS1893Y-10 Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
36
Chapter 5 Interface Overviews
January, 2004
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