IDT82P2282PF IDT, Integrated Device Technology Inc, IDT82P2282PF Datasheet - Page 216
IDT82P2282PF
Manufacturer Part Number
IDT82P2282PF
Description
TXRX T1/J1/E1 2CHAN 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Transceiverr
Datasheet
1.IDT82P2282PF8.pdf
(381 pages)
Specifications of IDT82P2282PF
Number Of Drivers/receivers
2/2
Protocol
IEEE 1149.1
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Screening Level
Industrial
Pin Count
100
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
82P2282PF
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T1/J1 PMON Interrupt Indication 0 (0C5H, 1C5H)
PRDGOVI:
DDSOVI:
COFAOVI:
OOFOVI:
FEROVI:
CRCOVI:
T1/J1 PMON Interrupt Indication 1 (0C6H, 1C6H)
LCVOVI:
Programming Information
IDT82P2282
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
= 0: The PMON indirect PRGD Counter Mapping registers have not overflowed.
= 1: The PMON indirect PRGD Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect DDSE Counter Mapping registers have not overflowed.
= 1: The PMON indirect DDSE Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect COFA Counter Mapping register has not overflowed.
= 1: The PMON indirect COFA Counter Mapping register has overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect OOF Counter Mapping register has not overflowed.
= 1: The PMON indirect OOF Counter Mapping register has overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect FER Counter Mapping registers have not overflowed.
= 1: The PMON indirect FER Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect CRCE Counter Mapping registers have not overflowed.
= 1: The PMON indirect CRCE Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
= 0: The PMON indirect LCV Counter Mapping registers have not overflowed.
= 1: The PMON indirect LCV Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
PRDGOVI
R
7
0
7
6
6
Reserved
5
5
DDSOVI
Reserved
R
4
0
4
216
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
COFAOVI
R
3
0
3
OOFOVI
R
2
0
2
FEROVI
R
1
0
1
August 20, 2009
CRCOVI
LCVOVI
R
R
0
0
0
0
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