PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 173

• Manufacturer Part Number: PSB2115HV1.2
• Manufacturer: Lantiq

Specifications of PSB2115HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
3.3.3
Interrupts from external devices can be indicated in the Interrupt Status Register (ISTA)
of the IPAC.
The auxiliary pins AUX6 and 7 can be configured as general I/O pins and as inputs they
can generate a maskable interrupt to the host (INT0, 1). The host can configure whether
the interrupt on these pins is edge or level triggered.
In contrast to all other interrupt sources in the ISTA register, INT0 and INT1 are masked
(MASK register) after reset.
Table 25 Auxiliary Interface Interrupts
Mnemonic Register Meaning
INT0/1
Auxiliary Interface
ISTA
External Interrupt 0/1
Activated if a negative edge or
level (programmable in
ACFG:EL0/1) is detected on
auxiliary pins AUX6/7.
173
Service interrupt from external
device(s).
Reaction
Operational Description
PSB 2115
PSF 2115
11.97