MT46V64M8BN-6:FTR Micron Technology Inc, MT46V64M8BN-6:FTR Datasheet - Page 50

• Manufacturer Part Number: MT46V64M8BN-6:FTR
• Manufacturer: Micron Technology Inc

Specifications of MT46V64M8BN-6:FTR

• Lead Free Status / Rohs Status: Compliant

WRITE
Figure 19:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
WRITE Command
Note:
The WRITE command is used to initiate a burst write access to an active row as shown in
Figure 19. The value on the BA0, BA1 inputs selects the bank, and the address provided
on inputs A0–Ai
and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
A10
EN AP = enable auto precharge; and DIS AP = disable auto precharge.
CS#
CK
HIGH
DIS AP
EN AP
Bank
Col
(
Don’t Care
where Ai is the most significant column address bit for a given density
50
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512Mb: x4, x8, x16 DDR SDRAM
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Commands