STM32W108CBU63TR STMicroelectronics, STM32W108CBU63TR Datasheet - Page 10

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STM32W108CBU63TR

Manufacturer Part Number
STM32W108CBU63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32W108CBU63TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Description
The STM32W108 is a fully integrated System-on-Chip that integrates a 2.4 GHz, IEEE
802.15.4-compliant transceiver, 32-bit ARM® Cortex™-M3 microprocessor, Flash and RAM
memory, and peripherals of use to designers of 802.15.4-based systems.
Figure 1.
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15 dB. The integrated
receive channel filtering allows for robust co-existence with other communication standards
in the 2.4 GHz spectrum, such as IEEE 802.11 and Bluetooth. The integrated regulator,
VCO, loop filter, and power amplifier keep the external component count low. An optional
high performance radio mode (boost mode) is software-selectable to boost dynamic range.
The integrated 32-bit ARM® Cortex™-M3 microprocessor is highly optimized for high
performance, low power consumption, and efficient memory utilization. Including an
integrated MPU, it supports two different modes of operation: Privileged mode and
Unprivileged mode. This architecture could be used to separate the networking stack from
the application code and prevent unwanted modification of restricted areas of memory and
registers resulting in increased stability and reliability of deployed solutions.
The STM32W108 has 128 Kbytes of embedded Flash memory and 8 Kbytes of integrated
RAM for data and program storage. The STM32W108 HAL software employs an effective
wear-leveling algorithm that optimizes the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by the ZigBee and IEEE 802.15.4-2003
standards, the STM32W108 integrates a number of MAC functions into the hardware. The
MAC hardware handles automatic ACK transmission and reception, automatic backoff
delay, and clear channel assessment for transmission, as well as automatic filtering of
RF_TX_ALT_P,N
VREG_OUT
nRESET
RF_P,N
BIAS_R
OSCA
OSCB
STM32W108 block diagram
PA select
HF crystal
Regulator
LF crystal
PA
Bias
OSC
POR
OSC
LNA
PA
Internal HF
Internal LF
RC-OSC
RC-OSC
Doc ID 16252 Rev 8
SYNTH
IF
Calibration
General
Purpose
ADC
DAC
ADC
ADC
PA[7:0], PB[7:0], PC[7:0]
GPIO multiplexor swtich
Baseband
Packet Trace
Packet sniffer
purpose
registers
SPI/I
General
MAC
UART/
timers
TX_ACTIVE
GPIO
+
2
C
STM32W108CB, STM32W108HB
Always
Powered
Domain
ARM CORTEX-M3
CPU debug
TPIU/ITM/
FPB/DWT
CPU with NVIC
Watchdog
manage r
8 kBytes
SRAM
Data
and MPU
Chip
®
Wire and
debug
128 kBytes
Serial
JTAG
Sleep
timer
Program
Encryption
controller
acclerator
Flash
2
Interrupt
nd
level
SWCLK,
Ai15250
JTCK

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