STM32W108HBU64TR STMicroelectronics, STM32W108HBU64TR Datasheet - Page 111
STM32W108HBU64TR
Manufacturer Part Number
STM32W108HBU64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108B-KEXT.pdf
(209 pages)
Specifications of STM32W108HBU64TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
STM32W108HBU64TR
Manufacturer:
TDK
Quantity:
30 000
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STM32W108CB, STM32W108HB
Figure 18. Counter timing diagram, update event when TIM_ARBE = 0
Figure 19. Counter timing diagram, update event when TIM_ARBE = 1 (TIMx_ARR
Down-counting mode
In down-counting mode, the counter counts from the auto-reload value (contents of the
TIMx_ARR register) down to 0, then restarts from the auto-reload value and generates a
counter underflow event.
An update event can be generated at each counter underflow, by setting the TIM_UG bit in
the TIMx_EGR register, or by using the slave mode controller). Software can disable the
update event by setting the TIM_UDIS bit in the TIMx_CR1 register, to avoid updating the
shadow registers while writing new values in the buffer registers. No update event occurs
until the TIM_UDIS bit is written to 0. However, the counter restarts from the current auto-
(TIMx_ARR not buffered)
buffered)
Doc ID 16252 Rev 8
General-purpose timers
111/209
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