MT29F1G08ABBDAH4-IT:D Micron Technology Inc, MT29F1G08ABBDAH4-IT:D Datasheet - Page 49

• Manufacturer Part Number: MT29F1G08ABBDAH4-IT:D
• Manufacturer: Micron Technology Inc

Specifications of MT29F1G08ABBDAH4-IT:D

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Address Bus: 27b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: VFBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 1.95V
• Word Size: 8b
• Number Of Words: 128M
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 63
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 33: PROGRAM FOR INTERNAL DATA INPUT (85h) Operation
PDF: 09005aef83e5ffed
m68a.pdf – Rev. D 06/10 EN
Cycle type
I/O[7:0]
RDY
As defined for PAGE
(CACHE) PROGRAM
D
Dn
IN
PROGRAM PAGE CACHE (80h-15h), and PROGRAM FOR INTERNAL DATA MOVE
(85h-10h). When used with these commands, the LUN address and plane select bits are
required to be identical to the LUN address and plane select bits originally specified.
The PROGRAM FOR INTERNAL DATA INPUT (85h) command enables the host to mod-
ify the original page and block address for the data in the cache register to a new page
and block address.
In devices that have more than one die (LUN) per target, the PROGRAM FOR INTER-
NAL DATA INPUT (85h) command can be used with other commands that support
interleaved die (multi-LUN) operations.
The PROGRAM FOR INTERNAL DATA INPUT (85h) command can be used with the RAN-
DOM DATA READ (05h-E0h) command to read and modify cache register contents in
small sections prior to programming cache register contents to the NAND Flash array.
This capability can reduce the amount of buffer memory used in the host controller.
The RANDOM DATA INPUT (85h) command can be used during the PROGRAM FOR
INTERNAL DATA MOVE command sequence to modify one or more bytes of the origi-
nal data. First, data is copied into the cache register using the 00h-35h command
sequence, then the RANDOM DATA INPUT (85h) command is written along with the
address of the data to be modified next. New data is input on the external data pins.
This copies the new data into the cache register.
Dn + 1
D
IN
Command
85h
Address
C1
Address
C2
49
Address
R1
Address
R2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb x8, x16: NAND Flash Memory
Address
R3
Column Address Operations
t
ADL
D
Dk
IN
© 2010 Micron Technology, Inc. All rights reserved.
Dk + 1
As defined for PAGE
D
(CACHE) PROGRAM
IN
Dk + 2
D
IN