DS26528G+ Maxim Integrated Products, DS26528G+ Datasheet - Page 263
![IC TXRX T1/E1/J1 OCT 256-CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS26528G+
Manufacturer Part Number
DS26528G+
Description
IC TXRX T1/E1/J1 OCT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528G+
Number Of Drivers/receivers
4/4
Protocol
IEEE 1149.1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.
The DS26528 IEEE 1149.1 design supports the standard instruction codes SAMPLE:PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. See
contains the following as required by IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture.
The Test Access Port has the necessary interface pins: JTRST , JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions for details.
Figure 13-1. JTAG Functional Block Diagram
JTAG BOUNDARY SCAN AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
10k Ω
V
DD
JTDI
10k Ω
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
10k Ω
263 of 276
V
DD
JTRST
SELECT
OUTPUT ENABLE
MUX
DS26528 Octal T1/E1/J1 Transceiver
Table
JTDO
13-1. The DS26528
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