DS26528G+ Maxim Integrated Products, DS26528G+ Datasheet - Page 276

IC TXRX T1/E1/J1 OCT 256-CSBGA

DS26528G+

Manufacturer Part Number
DS26528G+
Description
IC TXRX T1/E1/J1 OCT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS26528G+

Number Of Drivers/receivers
4/4
Protocol
IEEE 1149.1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DOCUMENT REVISION HISTORY (continued)
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
M a x i m I n t e g r a t e d P r o d u c t s , 1 2 0 S a n G a b r i e l D r i v e , S u n n y v a l e , C A 9 4 0 8 6 4 0 8 - 7 3 7 - 7 6 0 0
REVISION
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
012307
072507
081707
112907
DATE
Corrected TSYNC1 ball (from B1 to B4).
Corrected RSYNC3 and RSYNC4 (previously said RSYNC2 for both).
Figure 8-11: In Note 4, changed S2/S3 to S3/S4 and changed S4/S5 to S5/S6; added Note 6.
Added note to RHC.RHR stating that the bit will clear automatically if RMMR.INIT_DONE has
been set.
Added note to T1RBOCC.RBR stating that the bit will clear automatically if
RMMR.INIT_DONE has been set.
Added note to THC1.THR stating that the bit will clear automatically if TMMR.INIT_DONE has
been set.
Added E1RFRID (061h) and TFRID (161h) (previously incorrectly listed as reserved) to
Table
Added E1RFRID (061h) (previously incorrectly listed as reserved) and added TFRID (161h)
(previously missing) to
Added Note 1 (specifications to -40°C are guaranteed by design and not production tested) to
the Absolute Maximum Ratings for -40°C to +85°C temp range.
Added Note 1 (timing parameters in the JTAG table are GBD) to
Elaborated on pin descriptions for TCLK, TCHCLK, and RCHCLK.
9-3.
Table
9-7.
© 2007 Maxim Integrated Products
DESCRIPTION
276 of 276
Table
DS26528 Octal T1/E1/J1 Transceiver
12-4.
CHANGED
20, 21, 23
102, 106
PAGES
92, 95
124
129
184
250
261
20
21
74

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