MC145574APB Freescale Semiconductor, MC145574APB Datasheet - Page 25

• Manufacturer Part Number: MC145574APB
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574APB

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
3.11.1
3.11.2
3.12.1
3.12.2
3.10
3.11
3.12
DEACTIVATION PROCEDURES
CCITT I.430, ETSI ETS 300012, and ANSI T1.605 specifications dictate that only an NT can deactivate
the S/T loop. Intuitively, this has to be the case because in a passive bus if one TE sends INFO 0,
seeking to deactivate the loop, the other TE’s INFO 3 simply overrides it.
An NT transmits INFO 0 to the TE(s) when it wishes to deactivate the S/T loop. This is done by setting
NR2(2) (Deactivation Request) to a 1. Note that this bit is internally reset to 0 after the internal activation
state machine has recognized its active transition.
INITIAL STATE OF B1 AND B2 CHANNELS
NT
When the MC145574 is configured as an NT, NR5(3:2) corresponds to “IDLE B1 channel on S/T loop”,
and “IDLE B2 channel on S/T loop”, respectively. The device comes out of a hardware or software
reset with these two bits reset to 0. Thus, the NT comes out of reset with the B1 and B2 channels
enabled. When the NT is transmitting INFO 4, data on the B1 and B2 IDL2 timeslots will be modulated
onto the S/T loop. Setting either of these nibble bits in the NT mode will idle the corresponding B
channel on the S/T loop. Note that putting a B channel in the idle mode affects only the transmitted
B channel. The demodulated B data is still transmitted out on IDL2 Tx, in accordance with the IDL2
specification.
TE
When the MC145574 is configured as a TE, NR5(3:2) corresponds to “ENABLE B1 channel on S/T
loop,” and “ENABLE B2 channel on S/T loop,” respectively. The device comes out of a hardware or
software reset with these two bits reset to 0. Thus, the TE comes out of reset with the B1 and B2
channels disabled. When the TE is transmitting INFO 3, data on the B1 and B2 IDL2 timeslots is not
modulated onto the S/T loop. Setting either of these bits enables the modulation of the corresponding
B channel onto the S/T loop.
Note that although the TE comes out of reset with both B channels in the idle mode, this only affects
the modulation path. Demodulated data is still transmitted on D out .
ADDITIONAL NOTES
M and N Parameters
For conformance qualification procedures, it is often necessary to state the values of M and N, where:
For the MC145574, M = 5 and N = 3.
Echo Channel
The NT demodulates the 2B+D data received from the TE(s). In addition to passing this data onto
the network, the NT echoes the D channel data back to the TE(s) using the echo channel. This echo
channel is monitored by the TEs and used in the D channel contention algorithm. For a detailed descrip-
tion, refer to Section 11.
M is the number of successive good S0 frames for frame synchronization, and
N is the number of successive bad S0 frames for frame loss.
MC145574
3–3