ST92T141K4M6 STMicroelectronics, ST92T141K4M6 Datasheet - Page 151

• Manufacturer Part Number: ST92T141K4M6
• Description: Microcontrollers (MCU) OTP EPROM 16K SPI
• Manufacturer: STMicroelectronics

Specifications of ST92T141K4M6

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 16 KB
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-34
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / Rohs Status: No

7.6.4 Register Description
DATA REGISTERS (DiR)
The conversion results for the 8 available chan-
nels are loaded into the 8 Data registers following
conversion of the corresponding analog input.
CHANNEL 0 DATA REGISTER (D0R)
R240 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D0.[7:0]: Channel 0 Data
CHANNEL 1 DATA REGISTER (D1R)
R241 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D1.[7:0]: Channel 1 Data
CHANNEL 2 DATA REGISTER (D2R)
R242 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D2.[7:0]: Channel 2 Data
CHANNEL 3 DATA REGISTER (D3R)
R243 - Read/Write
Register Page: 63
Reset Value: undefined
D0.7
D1.7
D2.7
D3.7
Bit 7:0 = D3.[7:0]: Channel 3 Data
7
7
7
7
D0.6 D0.5
D1.6 D1.5
D2.6 D2.5
D3.6 D3.5
D0.4
D1.4
D2.4
D3.4
D0.3 D0.2
D1.3 D1.2
D2.3 D2.2
D3.3 D3.2
D0.1 D0.0
D1.1 D1.0
D2.1 D2.0
D3.1 D3.0
ST92141 - ANALOG TO DIGITAL CONVERTER (ADC)
0
0
0
0
CHANNEL 4 DATA REGISTER (D4R)
R244 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D4.[7:0]: Channel 4 Data
CHANNEL 5 DATA REGISTER (D5R)
R245 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D5.[7:0]: Channel 5 Data
CHANNEL 6 DATA REGISTER (D6R)
R246 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D6.[7:0]: Channel 6 Data
CHANNEL 7 DATA REGISTER (D7R)
R247 - Read/Write
Register Page: 63
Reset Value: undefined
Bit 7:0 = D7.[7:0]: Channel 7 Data
D4.7
D5.7
D6.7
D7.7
7
7
7
7
D4.6
D5.6
D6.6
D7.6
D4.5 D4.4
D5.5 D5.4
D6.5 D6.4
D7.5 D7.4
D4.3 D4.2
D5.3 D5.2
D6.3 D6.2
D7.3 D7.2
D4.1
D5.1
D6.1
D7.1
151/179
D4.0
D5.0
D6.0
D7.0
9
0
0
0
0