ADV7184BSTZ Analog Devices Inc, ADV7184BSTZ Datasheet - Page 29

• Manufacturer Part Number: ADV7184BSTZ
• Description: IC DECODER VID SDTV MULTI 80LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7184BSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Resolution (bits): 10bit
• Adc Sample Rate: 54MSPS
• Power Dissipation Pd: 550mW
• No. Of Input Channels: 12
• Supply Voltage Range: 1.65V To 2V, 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Tv /: RoHS Compliant
• Input Format: Analogue
• Output Format: Digital
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SD_OFF_CB [7:0], SD Offset Cb Channel,
Address 0xE1 [7:0]
These bits allow the user to adjust the hue of the picture by
selecting the offset for the Cb channel. There is a functional
overlap with the HUE [7:0] bits.
Table 31. SD_OFF_CB [7:0] Function
SD_OFF_CB [7:0]
0x80 (default)
0x00
0xFF
SD_OFF_CR [7:0], SD Offset Cr Channel, Address 0xE2 [7:0]
These bits allow the user to select an offset for data on only the
Cr channel and to adjust the hue of the picture. There is a
functional overlap with the HUE [7:0] bits.
Table 32. SD_OFF_CR [7:0] Function
SD_OFF_CR [7:0]
0x80 (default)
0x00
0xFF
BRI [7:0], Brightness Adjust, Address 0x0A [7:0]
These bits control the brightness of the video signal and allow
the user to adjust the brightness of the picture.
Table 33. BRI [7:0] Function
BRI [7:0]
0x00 (default)
0x7F
0x80
HUE [7:0], Hue Adjust, Address 0x0B [7:0]
These bits contain the value for the color hue adjustment and
allow the user to adjust the hue of the picture.
HUE [7:0] has a range of ±90°, with a value of 0x00 equivalent to
an adjustment of 0°. The resolution of HUE [7:0] for one bit is 0.7°.
The hue adjustment value is fed into the AM color demodulation
block. Therefore, it only applies to video signals that contain
chroma information in the form of an AM-modulated carrier
(CVBS or Y/C in PAL or NTSC). It does not affect SECAM and
does not work on component video inputs (YPrPb).
Table 34. HUE [7:0] Function
HUE [7:0]
0x00 (default)
0x7F
0x80
Description
Offset of the luma channel = 0 mV
Offset of the luma channel = +204 mV
Offset of the luma channel = −204 mV
Description
0 mV offset applied to the Cr channel
−568 mV offset applied to the Cr channel
+568 mV offset applied to the Cr channel
Description
0 mV offset applied to the Cb channel
−568 mV offset applied to the Cb channel
+568 mV offset applied to the Cb channel
Description
Phase of the chroma signal = 0°
Phase of the chroma signal = +90°
Phase of the chroma signal = −90°
Rev. A | Page 29 of 112
DEF_Y [5:0], Default Value Y, Address 0x0C [7:2]
If the ADV7184 loses lock to the incoming video signal or if
there is no input signal, the DEF_Y [5:0] bits allow the user to
specify a default luma value to be output. The register is used if
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The DEF_Y [5:0] values define the six MSBs of the output video.
The remaining LSBs are padded with 0s. For example, in 8-bit
mode, the output is Y [7:0] = {DEF_Y [5:0], 0, 0}.
The value for Y is set by the DEF_Y [5:0] bits. A value of 0x0D
in conjunction with the DEF_C [7:0] default setting produces a
blue color.
Register 0x0C has a default value of 0x36.
DEF_C [7:0], Default Value C, Address 0x0D [7:0]
The DEF_C [7:0] bits complement the DEF_Y [5:0] bits. These
bits define the four MSBs of the Cr and Cb values to be output if
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The data that is finally output from the ADV7184 for the chroma
side is the output pixel buses Cr [7:0] = {DEF_C [7:4], 0, 0, 0, 0}
and Cb [7:0] = {DEF_C [3:0], 0, 0, 0, 0}.
The values for Cr and Cb are set by the DEF_C [7:0] bits. A
value of 0x7C in conjunction with the DEF_Y [5:0] default
setting produces a blue color.
DEF_VAL_EN, Default Value Enable, Address 0x0C [0]
This bit forces the use of the default values for Y, Cr, and Cb.
Refer to the descriptions in the DEF_Y [5:0], Default Value Y,
Address 0x0C [7:2] and DEF_C [7:0], Default Value C, Address
0x0D [7:0] sections for additional information. In this mode,
the decoder also outputs a stable 27 MHz clock, HS, and VS.
0 (default)—Outputs a colored screen determined by user-
programmable Y, Cr, and Cb values when the decoder free runs.
Free-run mode is turned on and off via DEF_VAL_AUTO_EN.
1—Forces a colored screen output determined by user-
programmable Y, Cr, and Cb values. This overrides picture
data even if the decoder is locked.
The DEF_VAL_AUTO_EN bit is set high and the ADV7184
loses lock to the input video signal. This is the intended
mode of operation (automatic mode).
The DEF_VAL_EN bit is set regardless of the lock status of
the video decoder. This is a forced mode that may be useful
during configuration.
The DEF_VAL_AUTO_EN bit is set high and the ADV7184
cannot lock to the input video (automatic mode).
The DEF_VAL_EN bit is set high (forced output).
ADV7184