ADV7321KSTZ Analog Devices Inc, ADV7321KSTZ Datasheet - Page 14

• Manufacturer Part Number: ADV7321KSTZ
• Description: IC VID ENC 6-12BIT DAC'S 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7321KSTZ

• Applications: EVD, DVD, SD/PS/HDTV
• Voltage - Supply, Analog: 2.5V
• Voltage - Supply, Digital: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 2.375V To 2.625V
• Operating Temperature Range: 0°C To +70°C
• Tv / Video Case Style: LQFP
• No. Of Pins: 64
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV7320/ADV7321
CONTROL
*SELECTED BY ADDRESS 0x01, BIT 7: SEE TABLE 21.
t
t
t
t
t
t
9
10
11
12
13
14
INPUTS
= CLOCK HIGH TIME
= CLOCK LOW TIME
= DATA SETUP TIME
= DATA HOLD TIME
= HD OUTPUT ACCESS TIME
= HD OUTPUT HOLD TIME
S9–S0/Y9–Y0*
S_HSYNC,
S_VSYNC,
S_BLANK
CONTROL
OUTPUTS
CLKIN_A
Y OUTPUT
a AND b AS PER RELEVANT STANDARD.
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE TIMING SPECIFICATION
SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A FALLING EDGE OF TRI-LEVEL SYNC ON THE OUTPUT
AFTER A TIME EQUAL TO THE PIPELINE DELAY.
C9–C0
P_HSYNC
P_BLANK
P_VSYNC
C9–C0
Y9–Y0
t
9
Y0
Cb0
t
10
Figure 14. 16-/20-Bit SD Only Pixel Input Mode (Input Mode 000)
a
t
11
c
Figure 15. HD 4:2:2 Input Timing Diagram
t
12
Cr0
Y1
Rev. A | Page 14 of 88
t
14
t
b
13
Cb2
Y2
Cr2
Y3
Cb0
Y0
Cr0
Y1
Cr1
Y2
IN SLAVE MODE
IN MASTER/SLAVE MODE
Cb1
Y3