HD3-6408-9Z Intersil, HD3-6408-9Z Datasheet

HD3-6408-9Z

Manufacturer Part Number

HD3-6408-9Z

Description

IC ASMA ADT CMOS 1.25MHZ 24DIP

Manufacturer

Intersil

Type

Manchester Encoder/Decoderr

Datasheet

1.HD3-6408-9Z.pdf (11 pages)

Specifications of HD3-6408-9Z

Applications

Security Systems

Voltage - Supply, Analog

4.5 V ~ 5.5 V

Voltage - Supply, Digital

4.5 V ~ 5.5 V

Mounting Type

Through Hole

Package / Case

24-DIP (0.600", 15.24mm)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

HD3-6408-9Z

Manufacturer:

Intersil

Quantity:

Company:

BOSTOCK HK LIMITED

Part Number:

HD3-6408-9Z

Manufacturer:

INTERS

Quantity:

542

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CMOS Asynchronous Serial Manchester

Adapter (ASMA)

The HD-6408 is a CMOS/LSI Manchester Encoder/Decoder

for creating a very high speed asynchronous serial data bus.

The Encoder converts serial NRZ data (typically from a shift

and parity bit. The Decoder recognizes this sync pulse and

identifies it as a Command Sync or a Data Sync. The data is

then decoded and shifted out in NRZ code (typically into a

shift register). Finally, the parity bit is checked. If there were

no Manchester or parity errors the Decoder responds with a

valid word signal. The Decoder puts the Manchester code to

full use to provide clock recovery and excellent noise

immunity at these very high speeds.

The HD-6408 can be used in many commercial applications

such as security systems, environmental control systems,

serial data links and many others. It utilizes a single 12 x

clock and achieves data rates of up to one million bits per

second with a very minimum overhead of only 4 bits out of

20, leaving 16 bits for data.

Pinout

SDO

GND

ESC

DSC

CDS

BOI

UDI

BZI

HD-6408 (DIP)

TOP VIEW

Data Sheet

SCI

BOO

DBS

SDI

BZO

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Low Bit Error Rate

• Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1MBit/s

• Sync Identification and Lock-In

• Clock Recovery

• Manchester II Encoder, Decoder

• Separate Encode and Decode

• Low Operating Power. . . . . . . . . . . . . . . . . . . 50mW at 5V

• Single Power Supply

• 24 Ld Package

• Pb-Free Plus Anneal Available (RoHS Compliant)

Ordering Information

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

*Pb-free PDIPs can be used for through hole wave solder processing

only. They are not intended for use in Reflow solder processing

applications.

HD3-6408-9

HD3-6408-9Z

(Note)

HD1-6408-9

NUMBER

PART

All other trademarks mentioned are the property of their respective owners.

March 7, 2006

Intersil (and design) is a registered trademark of Intersil Americas Inc.

HD3-6408-9

HD3-6408-9Z -40 to +85 24 Ld PDIP*

HD1-6408-9

MARKING

PART

-40 to +85 24 Ld PDIP

-40 to +85 24 Ld CERDIP

RANGE

TEMP.

(°C)

(Pb-Free)

PACKAGE

HD-6408

FN2952.2

E24.6

F24.6

PKG.

NO.

Related parts for HD3-6408-9Z

HD3-6408-9Z Summary of contents

Page 1

... All other trademarks mentioned are the property of their respective owners. HD-6408 FN2952.2 TEMP. PART RANGE MARKING (°C) PACKAGE HD3-6408-9 - PDIP HD3-6408-9Z - PDIP* (Pb-Free) HD1-6408-9 - CERDIP | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved PKG. NO. E24.6 E24.6 ...

Page 2

Block Diagrams ENCODER 23 ÷ ÷ BIT COUNTER SCI 2 2 ESC 21 COUNT SD RESET DECODER 20 SS SYNC CHARACTER PARITY FORMER 18 DATA 19 SDI EE 2 HD-6408 DBS 13 MR VALID ...

Page 3

Pin Description PIN TYPE SYMBOL ESC SDO BZI 7 I BOI 8 I UDI 9 O DSC 10 O CDS ...

Page 4

Encoder Operation The Encoder requires a single clock with a frequency of twice the desired data rate applied at the SClock input. An auxiliary divide by six counter is provided on chip which can be utilized to produce the SClock ...

Page 5

Decoder Operation The Decoder requires a single clock with a frequency of 12 times the desired data rate applied at the DClock input. The Manchester II coded data can be presented to the Decoder in one of two ways. The ...

Page 6

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 7

AC Electrical Specifications V SYMBOL PARAMETER (16) T Enable Hold E10 (17) T Sync Hold E11 DECODER TIMING (18) F Decoder Clock Frequency DC (19) T Decoder Clock Rise Time DCR (20) T Decoder Clock Fall Time DCF (21) F ...

Page 8

AC Testing Input, Output Waveform INPUT NOTE: AC Testing: All input signals must switch between V Encoder Timing SCI ESC SDI VALID TE2 (8) SC ESC EE SS ESC SD SC BOO OR BZO 8 HD-6408 V IH 50% V ...

Page 9

Decoder Timing BIT PERIOD BOI T D1 (26 (27) BZI COMMAND SYNC BOI BZI (26) DATA SYNC T D1 BOI (26 (28 BZI (28 (29) ONE (27) T ...

Page 10

Decoder Timing (Continued) DSC (31 CDS T D7 (32) TD DSC (33 SDO DSC (34 CDS (35) T D10 TD VW DSC DR 10 HD-6408 DATA BIT (36) T D11 (23) T DRS (22) ...

Page 11

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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