STA015B$ STMicroelectronics, STA015B$ Datasheet - Page 19

DECODER AUDIO MPEG 2.5 8X8LFBGA

STA015B$

Manufacturer Part Number
STA015B$
Description
DECODER AUDIO MPEG 2.5 8X8LFBGA
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet

Specifications of STA015B$

Applications
Sound Cards, Players, Recorders
Voltage - Supply, Digital
2.4 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-

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0
UPD_FRAC: when is set to 1, update FRAC in the switching circuit. It is set to 1 after autoboot.
XTI2OCLK: when is set to 1, use the XTI as input of the divider X instead of VCO output. It is set to 0 on
HW reset.
XTI2DSPCLK: when is to 1, set use the XTI as input of the divider S instead of VCO output. It is set to 0
on HW reset.
PLLDIS: when set to 1, the VCO output is disabled. It is set to 0 on HW reset.
SYS2OCLK: when is set to 1, the OCLK frequency is equal to the system frequency. It is useful for testing.
It is set to 0 on HW reset.
OCLKEN: when is set to 1, the OCLK pad is enable as output pad. It is set to 1 on HW reset.
XTODIS: when is set to 1, the XTO pad is disable. It is set to 0 on HW reset.
XTO_BUF: when this bit is set, the pin nr. 28 (OUT_CLOCK/DATA_REQ) is enabled. It is set to 0 after
autoboot.
PLLCTL (M)
Address: 0x06 (06)
Type: R/W
Software Reset: 0x0C
Hardware Reset: 0x0C
PLLCTL (N)
Address: 0x07 (07)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
The M and N registers are used to configure the STA015 PLL by DSP embedded software.
M and N registers are R/W type but they are completely controlled, on STA015, by DSP software.
REQ_POL
Address: 0x0C (12)
Type: R/W
Software Reset: 0x01
Hardware Reset: 0x00
The REQ_POL registers is used to program the polarity of the DATA_REQ line.
Default polarity (the source sends data when the DATA_REQ line is high)
Inverted polarity (the source sends data when the ATA_REQ line is low)
MSB
MSB
b7
b7
0
0
b6
b6
0
0
b5
b5
0
0
b4
b4
0
0
b3
b3
0
0
b2
b2
0
1
b1
b1
0
0
STA015
LSB
LSB
b0
b0
1
1
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