PCA9535BS,118 NXP Semiconductors, PCA9535BS,118 Datasheet - Page 7
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PCA9535BS,118
Manufacturer Part Number
PCA9535BS,118
Description
IC I/O EXPANDER I2C 16B 24HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9535BS118.pdf
(31 pages)
Specifications of PCA9535BS,118
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Interface
I²C, SMBus
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9535
Number Of Lines (input / Output)
16.0 / 16.0
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
200 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5 V
Logic Type
I2C, SMBus
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Number Of Input Lines
16.0
Number Of Output Lines
16.0
Output Current
50 mA
Output Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3376-2
935273944118
PCA9535BS-T
935273944118
PCA9535BS-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9535BS,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCA9535_PCA9535C_5
Product data sheet
6.2.2 Registers 0 and 1: Input port registers
6.2.3 Registers 2 and 3: Output port registers
6.2.4 Registers 4 and 5: Polarity Inversion registers
This register is an input-only port. It reflects the incoming logic levels of the pins,
regardless of whether the pin is defined as an input or an output by Register 3. Writes to
this register have no effect.
The default value ‘X’ is determined by the externally applied logic level.
Table 5.
Table 6.
This register is an output-only port. It reflects the outgoing logic levels of the pins defined
as outputs by Registers 6 and 7. Bit values in this register have no effect on pins defined
as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling
the output selection, not the actual pin value.
Table 7.
Table 8.
This register allows the user to invert the polarity of the Input port register data. If a bit in
this register is set (written with ‘1’), the Input port data polarity is inverted. If a bit in this
register is cleared (written with a ‘0’), the Input port data polarity is retained.
Table 9.
Table 10.
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Input port 0 Register
Input port 1 register
Output port 0 register
Output port 1 register
Polarity Inversion port 0 register
Polarity Inversion port 1 register
O0.7
O1.7
N0.7
N1.7
I0.7
I1.7
X
X
7
7
7
1
7
1
7
0
7
0
Rev. 05 — 15 September 2008
O0.6
O1.6
N0.6
N1.6
I0.6
I1.6
X
X
6
6
6
1
6
1
6
0
6
0
16-bit I
O0.5
O1.5
N0.5
N1.5
I0.5
I1.5
2
X
X
5
5
5
1
5
1
5
0
5
0
C-bus and SMBus, low power I/O port with interrupt
O0.4
O1.4
N0.4
N1.4
I0.4
I1.4
X
X
4
4
4
1
4
1
4
0
4
0
PCA9535; PCA9535C
O0.3
O1.3
N0.3
N1.3
I0.3
I1.3
X
X
3
3
3
1
3
1
3
0
3
0
O0.2
O1.2
N0.2
N1.2
I0.2
I1.2
2
X
2
X
2
2
2
2
1
1
0
0
© NXP B.V. 2008. All rights reserved.
O0.1
O1.1
N0.1
N1.1
I0.1
I1.1
X
X
1
1
1
1
1
1
1
0
1
0
O0.0
O1.0
N0.0
N1.0
I0.0
I1.0
X
X
0
0
0
1
0
1
0
0
0
0
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