PCA9555PW,112 NXP Semiconductors, PCA9555PW,112 Datasheet - Page 20

• Manufacturer Part Number: PCA9555PW,112
• Description: IC I/O EXPANDER I2C 16B 24TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9555PW,112

• Package / Case: 24-TSSOP
• Interface: I²C, SMBus
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA
• Number Of Lines (input / Output): 16 / 16
• Operating Supply Voltage: 2.3 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 2.3 V to 5.5 V
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 16
• Number Of Output Lines: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-3986-5; 935269569112; PCA9555PW; PCA9555PW

NXP Semiconductors
11. Dynamic characteristics
Table 15.
[1]
[2]
[3]
PCA9555_8
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
Port timing
t
t
t
Interrupt timing
t
t
SCL
BUF
HD;STA
SU;STA
SU;STO
VD;ACK
HD;DAT
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
v(Q)
su(D)
h(D)
v(INT_N)
rst(INT_N)
t
t
C
VD;ACK
VD;DAT
b
= total capacitance of one bus line in pF.
= minimum time for SDA data out to be valid following SCL LOW.
= time for acknowledgement signal from SCL LOW to SDA (out) LOW.
Parameter
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data valid acknowledge time
data hold time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
data output valid time
data input set-up time
data input hold time
valid time on pin INT
reset time on pin INT
Dynamic characteristics
Rev. 08 — 22 October 2009
Conditions
16-bit I
[1]
[2]
Standard-mode
Min
300
250
150
4.7
4.0
4.7
4.0
0.3
4.7
4.0
2
0
0
1
-
-
-
-
-
-
C-bus and SMBus I/O port with interrupt
I
2
C-bus
1000
Max
3.45
100
300
200
50
4
4
-
-
-
-
-
-
-
-
-
-
-
20 + 0.1C
20 + 0.1C
Fast-mode I
Min
100
150
1.3
0.6
0.6
0.6
0.1
1.3
0.6
50
0
0
1
-
-
-
-
b
b
PCA9555
[3]
[3]
© NXP B.V. 2009. All rights reserved.
2
C-bus
Max
400
300
300
200
0.9
50
4
4
-
-
-
-
-
-
-
-
-
-
-
20 of 34
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s