PCA9557D,118 NXP Semiconductors, PCA9557D,118 Datasheet - Page 7

IC I/O EXPANDER I2C 8B 16SOIC

PCA9557D,118

Manufacturer Part Number
PCA9557D,118
Description
IC I/O EXPANDER I2C 8B 16SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9557D,118

Package / Case
16-SOIC (3.9mm Width)
Interface
I²C, SMBus
Number Of I /o
8
Interrupt Output
No
Frequency - Clock
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9557
Number Of Lines (input / Output)
8.0 / 8.0
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
200 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5 V
Logic Type
I2C, SMBus
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Number Of Input Lines
8.0
Number Of Output Lines
8.0
Output Current
50 mA
Output Voltage
5 V
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
SO
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935270674118
PCA9557D-T
PCA9557D-T
NXP Semiconductors
7. Functional description
PCA9557
Product data sheet
7.1 Device address
7.2 Control register
Refer to
Following a START condition the bus master must output the address of the slave it is
accessing. The address of the PCA9557 is shown in
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
The last bit of the slave address defines the operation to be performed. When set to
logic 1 a read is selected, while a logic 0 selects a write operation.
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9557, which will be stored in the control register. This register can be
written and read via the I
Table 4.
D1
0
0
1
1
Fig 8.
Fig 9.
Figure 1 “Block diagram of
PCA9557 device address
Control register
D0
0
1
0
1
Register definition
Name
Register 0
Register 1
Register 2
Register 3
Rev. 06 — 11 June 2008
2
C-bus.
bit:
0
7
0
0
fixed
PCA9557”.
6
0
Access
read-only
read/write
read/write
read/write
slave address
1
5
0
1
8-bit I
4
0
programmable
A2
3
0
2
A1
C-bus and SMBus I/O port with reset
2
0
Figure
A0 R/W
002aad279
Description
Input port register
Output port register
Polarity inversion register
Configuration register
D1
002aad280
1
D0
0
8. To conserve power, no
PCA9557
© NXP B.V. 2008. All rights reserved.
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