MT46H16M32LFCM-75 L TR Micron Technology Inc, MT46H16M32LFCM-75 L TR Datasheet - Page 73
![](/photos/31/34/313421/mfg557-90-vfbga_sml.jpg)
MT46H16M32LFCM-75 L TR
Manufacturer Part Number
MT46H16M32LFCM-75 L TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H16M32LFCM-75_L_TR.pdf
(98 pages)
Specifications of MT46H16M32LFCM-75 L TR
Organization
16Mx32
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
100mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
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Figure 34: Write – DM Operation
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
6
t
t
IS
IS
NOP
T0
t
1
t
IH
IH
Notes:
t
t
ACTIVE
IS
Bank x
IS
Row
Row
T1
t
t
IH
IH
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T8 is “Don’t Care” if A10 is HIGH at T8.
6. D
t
CK
these times.
t
t
IN
RCD
RAS
n = data-in from column n.
NOP
T2
1
t
CH
t
CL
t
WPRES
t
WRITE
IS
Bank x
Note 4
Col n
T3
t
IH
t
2
DQSS (NOM)
t
73
DS
NOP
T4
D
512Mb: x16, x32 Mobile LPDDR SDRAM
IN
t
WPRE
1
t
DH
T4n
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DQSL
NOP
D
T5
IN
t
DQSH
1
T5n
t
WPST
NOP
T6
1
Don’t Care
© 2004 Micron Technology, Inc. All rights reserved.
WRITE Operation
t
NOP
WR
T7
1
1
Transitioning Data
One bank
All banks
Bank x
PRE
T8
3
5
t
RP
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