DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 14

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DS1878T+T&R

Manufacturer Part Number
DS1878T+T&R
Description
IC CTLR SFP W/DGTL LDD RX 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP+ Controllerr
Datasheet

Specifications of DS1878T+T&R

Input Type
*
Output Type
*
Interface
*
Current - Supply
*
Mounting Type
Surface Mount
Package / Case
28-WFQFN exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(MODTC, Table 02h, Register C6h) and a temperature
index register (MODTI, Table 02h, Register C2h).
The device has two internal registers, MODULATION
and BIAS, that represent the values written to the Maxim
laser driver’s modulation DAC and bias DAC through
the 3-wire interface. On power-up, the device sets the
MODULATION and BIAS registers to 0. When V
above POA, the device initializes the Maxim laser driver.
After a temperature conversion is completed and if the
VCC LO alarm is enabled, an additional V
above the customer-defined VCC LO alarm level is
required before a Maxim laser driver MODULATION
register is updated with the value determined by the
temperature conversion and the modulation LUT.
When the MODULATION register is set, the BIAS regis-
ter is set to a value equal to ISTEP (see Figure 2). The
startup algorithm verifies whether this bias current caus-
es a feedback voltage above the APC set point, and if
not, it continues increasing the BIAS register by ISTEP
until the APC set point is exceeded. When the APC set
point is exceeded, the device begins a binary search to
quickly reach the bias current corresponding to the
proper power level. After the binary search is complet-
ed, the APC integrator is enabled and single LSB steps
are used to tightly control the average power.
SFP+ Controller with Digital LDD Interface
Figure 2. Power-Up Timing
14
______________________________________________________________________________________
MODULATION REGISTER
BIAS REGISTER
BIAS and MODULATION Control
BIAS SAMPLE
V
CC
V
POA
During Power-Up
t
ISTEP
INIT
2x ISTEP
CC
3x ISTEP
1
conversion
4x ISTEP
2
CC
is
3
4
The TXP HI, TXP LO, and BIAS MAX QT alarms are
masked until the binary search is completed. However,
the BIAS MAX alarm is monitored during this time to
prevent
IBIASMAX. During the bias current initialization, the
BIAS register is not allowed to exceed IBIASMAX. If this
occurs during the ISTEP sequence, then the binary
search routine is enabled. If IBIASMAX is exceeded
during the binary search, the next smaller step is acti-
vated. ISTEP or binary increments that would cause the
BIAS register to exceed IBIASMAX are not taken.
Masking the alarms until the completion of the binary
search prevents false positive alarms during startup.
ISTEP is a value controlled by registers ISTEPH,
ISTEPL, and ISTEPTI (Table 02h, Registers BAh, BBh,
and C5h, respectively). See the register descriptions for
more information. During the first steps, a Maxim laser
driver’s bias DAC is directly written using SET_IBIAS.
ISTEP should be programmed to the maximum safe
increase that is allowable during startup. If this value is
programmed too low, the device still operates, but it
could take significantly longer for the algorithm to con-
verge and hence to control the average power.
If a fault is detected, and TXD is toggled to reenable
the outputs, the device powers up following a similar
sequence to an initial power-up. The only difference is
that the device already has determined the present
5
t
SEARCH
6
the
BINARY SEARCH
7
BIAS
8
9
register
10
APC INTEGRATOR ON
11
from
12
exceeding
13

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