DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 72

• Manufacturer Part Number: DS1878T+T&R
• Description: IC CTLR SFP W/DGTL LDD RX 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1878T+T&R

• Input Type: *
• Output Type: *
• Interface: *
• Current - Supply: *
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 02h, Register BAh: ISTEPH
SFP+ Controller with Digital LDD Interface
Table 02h, Register BBh: ISTEPL
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BAh
BBh
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
ISTEP is the initial step value used at power-on or after a TXD pulse to control the BIAS register. The particular
ISTEP used depends on the value of TINDEX and ISTEPTI (Table 02h, Register C5h). When TINDEX > ISTEPTI,
ISTEPH is used. When TINDEX < ISTEPTI, ISTEPL is used. At startup, this value plus 2
to the BIAS register value until the APC feedback (MON2) is greater than its threshold. At that time, a binary
search is used to complete the startup of the APC closed loop. If the resulting math operation is greater than
IBIASMAX (Table 02h, Register EEh), the result is not loaded into the BIAS register, but the binary search is
begun to complete the initial search for APC. During startup, the BIAS register steps causing a higher bias value
than IBIASMAX do not create the BIAS MAX alarm. The BIAS MAX alarm detection is enabled at the end of the
binary search.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
See the ISTEPH register description.
BIT 7
BIT 7
2
2
8
8
2
2
7
7
00h
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
PW2 or (PW1 and RWTBL246)
Nonvolatile (SEE)
00h
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
PW2 or (PW1 and RWTBL246)
Nonvolatile (SEE)
2
2
6
6
2
2
5
5
2
2
4
4
2
2
3
3
0
= 1 is continuously added
2
2
2
2
BIT 0
BIT 0
2
2
1
1