DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 32

no-image

DS1878T+T&R

Manufacturer Part Number
DS1878T+T&R
Description
IC CTLR SFP W/DGTL LDD RX 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP+ Controllerr
Datasheet

Specifications of DS1878T+T&R

Input Type
*
Output Type
*
Interface
*
Current - Supply
*
Mounting Type
Surface Mount
Package / Case
28-WFQFN exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SFP+ Controller with Digital LDD Interface
The ALARM ENABLE bytes (Registers F8h–FFh) can be configured to exist in Table 05h instead of here at Table 01h
with the MASK bit (Table 02h, Register 89h). If the row is configured to exist in Table 05h, then these locations are
empty in Table 01h.
The access codes represent the factory default values of PW_ENA and PW_ENB (Table 02h, Registers C0h–C1h).
32
Read
Access
Write
Access
ACCESS
80–BF
C0–F7
(HEX)
ROW
CODE
F8
______________________________________________________________________________________
<7>
<8>
<8>
ENABLE
separately
NAME
See each
EEPROM
ROW
EEPROM
ALARM
bit/byte
<0>
BYTE 0/8
ALARM
PW2
<1>
All
EN
EE
EE
3
WORD 0
<2>
N/A
All
BYTE 1/9
ALARM
EN
EE
EE
hardware
All and
2
device
<3>
All
BYTE 2/A
ALARM
PW2 +
EN
mode
EE
EE
PW2
<4>
bit
1
TABLE 01h
WORD 1
BYTE 3/B
<5>
All
All
ALARM
EN
EE
EE
0
<6>
N/A
All
WARN EN
BYTE 4/C
EE
EE
PW1
PW1
<7>
WORD 2
3
WARN EN
BYTE 5/D
PW2
PW2
<8>
Table 01h Register Map
EE
EE
2
PW2
<9>
N/A
RESERVED
BYTE 6/E
EE
EE
WORD 3
<10>
PW2
N/A
RESERVED
BYTE 7/F
EE
EE
<11>
PW1
All

Related parts for DS1878T+T&R