AD9847AKST Analog Devices Inc, AD9847AKST Datasheet - Page 22

• Manufacturer Part Number: AD9847AKST
• Description: IC CCD SIGNAL PROC 10BIT 48-LQFP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9847AKST

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 40MSPS
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7/3V
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

AD9847
NOTES
1. FLD FALLING EDGE (START OF ODD FIELD) WILL RESET THE PxGA GAIN REGISTER STEERING TO “0101” LINE.
2. FLD RISING EDGE (START OF EVEN FIELD) WILL RESET THE PxGA GAIN REGISTER STEERING TO “2323“ LINE.
3. HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO EITHER “0” (FLD = ODD) OR “2” (FLD = EVEN).
PxGA GAIN
PxGA GAIN
PxGA GAIN
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN REGISTER STEERING TO “0101” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN REGISTER STEERING BETWEEN “0101” AND “2323” LINES.
3. FLD STATUS IS IGNORED.
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN REGISTER STEERING TO “0101” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN REGISTER STEERING BETWEEN “0101” AND “1212” LINES.
3. ALL FIELDS WILL HAVE THE SAME PxGA GAIN STEERING PATTERN (FLD STATUS IS IGNORED).
PxGA GAIN
NOTES
1. EACH LINE FOLLOWS “012012” STEERING PATTERN.
2. VD AND HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO “0.”
3. FLD STATUS IS IGNORED.
REGISTER
REGISTER
REGISTER
REGISTER
FLD
FLD
FLD
FLD
HD
HD
VD
HD
VD
HD
VD
VD
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
0
2
1
1
1
0
2
0
1
0
ODD FIELD
ODD FIELD
ODD FIELD
ODD FIELD
1
2
3
1
Figure 16b. Mosaic Interlaced Mode
Figure 16a. Mosaic Separate Mode
2
0
1
2
Figure 16c. Mosaic Repeat Mode
Figure 16d. Three-Color Mode
1
2
3
0
0
0
0
0
1
1
1
1
0
0
0
2
–22–
1
1
1
0
2
0
0
0
1
1
1
3
2
0
0
2
3
1
1
0
2
2
1
0
EVEN FIELD
EVEN FIELD
EVEN FIELD
EVEN FIELD
3
2
3
1
2
1
2
2
3
2
3
0
0
2
0
0
1
3
1
1
2
0
0
2
3
1
1
0
0
0
0
0
REV. A