AD9847AKST Analog Devices Inc, AD9847AKST Datasheet - Page 24

IC CCD SIGNAL PROC 10BIT 48-LQFP

AD9847AKST

Manufacturer Part Number
AD9847AKST
Description
IC CCD SIGNAL PROC 10BIT 48-LQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 10-Bitr
Datasheet

Specifications of AD9847AKST

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
48-LQFP
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
40MSPS
Input Voltage Range
0.5V
Operating Supply Voltage (min)
2.7/3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Resolution
10b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Number Of Channels
1
Current - Supply
-
Lead Free Status / RoHS Status
Not Compliant

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AD9847
The same Bayer pattern can also be interlaced, and the VD selected
mode should be used with this type of CCD (see Figure 18b).
The color steering performs the proper multiplexing of the R, G,
and B gain values (loaded into the PxGA gain registers) and is
synchronized by the user with vertical (VD) and horizontal (HD)
sync pulses. For more detailed information, see the PxGA Timing
section. The PxGA gain for each of the four channels varies from
–2 dB to +10 dB, controlled in 64 steps through the serial inter-
face. The PxGA gain curve is shown in Figure 19.
Figure 18a. CCD Color Filter Example: Progressive Scan
CDS
CCD: PROGRESSIVE BAYER
Gb
Gb
Gb
Gb
Gb
Gb
Figure 18b. CCD Color Filter Example: Interlaced
R
R
R
R
R
R
CCD: INTERLACED BAYER
SHP/SHD
EVEN FIELD
VD
HD
Gr
Gr
ODD FIELD
Gr
Gr
Gr
Gr
B
B
B
B
B
B
Figure 17. PxGA Block Diagram
PxGA
6
Gb
Gb
Gb
Gb
Gb
Gb
R
R
R
R
R
R
STEERING
CONTROL
COLOR
2
MUX
Gr
Gr
Gr
Gr
Gr
Gr
B
B
B
B
B
B
4:1
VGA
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
MOSAIC SEPARATE COLOR
STEERING MODE
VD SELECTED COLOR
STEERING MODE
3
GAIN0
GAIN1
GAIN2
GAIN3
PxGA STEERING
GAIN0, GAIN1, GAIN0, GAIN1...
GAIN2, GAIN3, GAIN2, GAIN3...
GAIN0, GAIN1, GAIN0, GAIN1...
GAIN0, GAIN1, GAIN0, GAIN1...
GAIN0, GAIN1, GAIN0, GAIN1...
GAIN0, GAIN1, GAIN0, GAIN1...
GAIN2, GAIN3, GAIN2, GAIN3...
GAIN2, GAIN3, GAIN2, GAIN3...
GAIN2, GAIN3, GAIN2, GAIN3...
SELECTION
PxGA GAIN
REGISTERS
MODE
CONTROL
REGISTER
BITS D0–D2
–24–
Variable Gain Amplifier
The VGA stage provides a gain range of 2 dB to 36 dB, program-
mable with 10-bit resolution through the serial digital interface.
Combined with 4 dB from the PxGA stage, the total gain range
for the AD9847 is 6 dB to 40 dB. The minimum gain of 6 dB is
needed to match a 1 V input signal with the ADC full-scale
range of 2 V. When compared to 1 V full-scale systems (such as
ADI’s AD9803), the equivalent gain range is 0 dB to 34 dB.
The VGA gain curve is divided into two separate regions. When
the VGA gain register code is between 0 and 511, the curve follows
a (1 + x)/(1 – x) shape, which is similar to a linear-in-dB character-
istic. From code 512 to code 1023, the curve follows a linear-in-dB
shape. The exact VGA gain can be calculated for any gain register
value by using the following two equations:
Code Range Gain Equation (dB)
0–511
512–1023
Figure 20. VGA Gain Curve (Gain from PxGA Not Included)
(100000)
10
–2
8
6
4
2
0
36
30
24
18
12
6
0
32
0
40
Gain = 20 log
Gain = (0.0354)(code) – 0.04
127
Figure 19. PxGA Gain Curve
48
255
PxGA GAIN REGISTER CODE
VGA GAIN REGISTER CODE
58
383
10
([658
0
511
8
639
code] / [658 – code]) – 0.4
16
767
24
895
(011111)
31
1023
REV. A

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