SLXT915QC.B3 Intel, SLXT915QC.B3 Datasheet
SLXT915QC.B3
Specifications of SLXT915QC.B3
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SLXT915QC.B3 Summary of contents
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... LXT915 Simple Quad Ethernet Repeater ® The Intel LXT915 Simple Quad Ethernet Repeater is an integrated multi-port repeater designed for mixed-media networks. It provides all the active circuitry required for the repeater function in a single CMOS device. It includes one Attachment Unit Interface (AUI) port and four 10BASE-T transceivers ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. ...
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... The Twisted Pair Interface ..................................................................... 20 3.1.2 The RBIAS Pin ....................................................................................... 20 3.2 Unmanaged Hub Application............................................................................... 20 3.3 Magnetics Requirements.....................................................................................24 3.3.1 The Twisted Pair Interface ..................................................................... 24 3.3.2 Component Selection ............................................................................. 24 4.0 Test Specifications......................................................................................................... 25 5.0 Mechanical Specifications............................................................................................. 29 5.1 Top Label Markings............................................................................................. 30 6.0 Ordering Information ..................................................................................................... 31 Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater 3 ...
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... Unmanaged Hub Application LED Mode 1 Selected ( ................... 23 8 Inter-Repeater Bus Timing .................................................................................. 28 9 Package Specifications ....................................................................................... 29 10 Sample HQFP Package – Intel 11 Sample Pb-Free (RoHS-Compliant) HQFP Package – Intel peater30 12 Ordering Information Matrix – Sample ................................................................ 32 Tables 1 Twisted-Pair Port Signal Descriptions ................................................................... 8 2 AUI Port Signal Descriptions ................................................................................. 8 3 Control, Status and Miscellaneous Signal Descriptions ...
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... Revision History Date Revision 20-Dec-2005 003 February 2001 002 Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater Page Description 7 Modified Figure 2 “Pin Assignments” on page 30 Added Section 5.1, “Top Label Markings” on page 30. 31 Added Table 20 “Product Information” on page 31. ...
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... Intel LXT915 Simple Quad Ethernet Repeater Figure 1. Block Diagram LEDM0 LEDM1 DOP Twisted-pair DON port #1 DIP DIN Port #2 DO/DI 4 DO/ Port # Port #4 DO/DI DOP DON DIP AUI port DIN (DTE only) CIP CIN DSQE 6 Control Inter-Repeater Backplane Port Repeater (State Machine, Timing Recovery, FIFO, ect ...
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... Part # LXT915 is the unique identifier for this product family. Identifies the particular silicon “stepping” (Refer to Specification Update for additional stepping Rev # information.) Lot # Identifies the batch. FPO # Identifies the Finish Process Order. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater ...
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... Intel LXT915 Simple Quad Ethernet Repeater Table 1. Twisted-Pair Port Signal Descriptions Pin Symbol I/O 44 TPDOP1 O 45 TPDON1 O 42 TPDOP2 O Twisted-Pair Data Outputs (Positive and Negative). These pins are the positive 41 TPDON2 O (TPDOP1-4) and negative (TPDON1-4) outputs to the network from the respective twisted- ...
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... Where no buffering is used, the total impedance should be no less than 330 Ω. 2. IRCFS and IRCOL cannot be buffered. In multi-board configurations, the total impedance on IRCOL should be no smaller than 330 W. IRCFS should be pulled up only once single 330 Ω, 1% resistor. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater Description Description 1 1 ...
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... Intel LXT915 Simple Quad Ethernet Repeater Table 5. Power Supply Signal Descriptions Pin Symbol I Power Supply. These pins each require a +5 VDC power supply. These various pins may be VCC 43 _ supplied from a single power source, but special de-coupling requirements may apply. Each VCC 55 pin must be within ± ...
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... IRB for broadcast on all ports simultaneously. This simultaneous rebroadcast allows the multi-repeater system to act as a single large repeater unit. The maximum number of repeaters on the IRB is Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater Table 1 for TP Port signal Table 2 ...
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... Intel LXT915 Simple Quad Ethernet Repeater limited by bus loading factors such as parasitic capacitance. The IRB can be operated synchronously or asynchronously. Refer to signal descriptions. 2.2.3.1 Synchronous IRB Operation In the synchronous mode, a common external source provides the 10 MHz backplane clock (BCLKIO) and the 20 MHz system clock (SYSCLK) to all repeaters. (BCLKIO must be synchronous to SYSCLK and may be derived from SYSCLK using a divide-by-two circuit ...
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... The following description applies to the initial power-on reset and to any subsequent hardware reset. When a reset occurs (RESET pin pulled high for > 1 ms), the device senses the levels at the various control pins ( and the IRB. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater START Begin UCT IDLE ...
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... Intel LXT915 Simple Quad Ethernet Repeater Figure 4. Partitioning State Diagram PARTITION WAIT Datain( Collin(X) = SQE DIPresent( *CIPresent(X) = SQE PARTITION HOLD Datain( Collin(X) = SQE DIPresent( CIPresent(X) = SQE PARTITION COLLISION WATCH Datain( Collin(X) = SQE StartTw5 CIPresent(X) = SQE Tw5Done * DIPresent( CIPresent(X) = SQE WAIT TO RESTORE ...
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... Reception Each LXT915 port receiver acquires data packets from its twisted-pair input (DIP/DIN). An internal RC filter and an intelligent squelch function discriminate noise from link test pulses and valid data streams. No external filters are required. The receive function is activated only by valid data streams (above the squelch level and with proper timing). If the differential signal at the DI circuit inputs falls below 75% of the threshold level (unsquelched) for eight bit times (typical), the port receiver enters the idle state ...
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... Intel LXT915 Simple Quad Ethernet Repeater 2.6 AUI Port Operation 2.6.1 AUI Reception The LXT915 AUI port receiver acquires data packets from the network (DIP/DIN). Only valid data streams above the squelch level activate the receive function. If the differential signal at the DI circuit inputs falls below 75% of the threshold level (unsquelched) for 8 bit times (typical), the AUI receiver enters the idle state ...
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... Pin Table 7. Mode 0 LED Truth Table (Default) Condition Reversed Polarity 4 5 Table 8. Mode 1 LED Truth Table Condition Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater Table 8. Table 9. Table 10. LEDM0 LED Mode Selected Pin (default LEDTP 1-4 LEDAUI Rx Link Pulse N/A Tx Packet ...
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... Intel LXT915 Simple Quad Ethernet Repeater Table 9. Mode 2 LED Truth Table Condition 1 2 Partitioned Out Table 10. Mode 3 LED Truth Table Condition Partitioned Out LEDTP 1-4 LEDAUI Rx Link Pulse N/A Partitioned Out N/A N/A Rx Packet Rx Packet N/A N/A LEDTP 1-4 LEDAUI ...
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... Condition 1: Steady Green Condition 2: Blinking Green 256 Condition 3: Steady Red Condition 4: Blinking Red 256 Condition 5: Alternating Red/Green Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater + Operation 820 Ω LXT915 470 Ω LED Driver 820 Ω 5. 93. 330 Ω Red 70 Ω Green 330 Ω ...
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... Intel LXT915 Simple Quad Ethernet Repeater 3.0 Application Information 3.1 Layout Requirements 3.1.1 The Twisted Pair Interface The four, twisted-pair output circuits are identical. Each TPDOP/TPDON signal has a 24.9 Ω, 1%, series resistor and a 120 pF capacitor differentially across the positive and negative outputs. These signals go directly to a 1:√ ...
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... The VCC and GND pins are at the bottom of each diagram. All VCC pins use a single power supply with decoupling capacitors installed between the VCC and GND pins and their respective planes. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater 21 ...
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... Intel LXT915 Simple Quad Ethernet Repeater Figure 6. 8-Port Unmanaged Hub Application, LED Mode 1 Selected ( Datasheet ...
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... Figure 7. 8-Port Unmanaged Hub Application LED Mode 1 Selected ( Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater 23 ...
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... Intel LXT915 Simple Quad Ethernet Repeater 3.3 Magnetics Requirements 3.3.1 The Twisted Pair Interface The LXT915 requires transformers with a 1:1 ratio for the receive pairs and 1:√2 on the transmit pairs. The transformer isolation voltage should be rated protect the circuitry from static voltages across the connectors and cables ...
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... Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to production testing. 3. Supply current may vary depending on the transformer, LED, and resistor selections. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater and Figure 8 ...
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... Intel LXT915 Simple Quad Ethernet Repeater Table 15. AUI Electrical Characteristics Parameter Symbol Input Low current Input High current Differential output voltage V Receive input impedance Z Differential squelch threshold V 1. Typical values are at 25 °C and are for design aid only; they are not guaranteed and no subject to production testing. ...
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... Time between Link Integrity Pulses Interval for valid receive Link Integrity Pulses 1. Typical values are at 25 °C and are for design aid only; they are not guaranteed and not subject to production testing. Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater 1 Min Typ 5.0 – ...
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... Intel LXT915 Simple Quad Ethernet Repeater Figure 8. Inter-Repeater Bus Timing Rx DATA t TPs t IRB5 AUI t IRB1 IRDEN t IRB2 IRENA t IRB3 IRDAT BCLKIO Table 19. Inter-Repeater Bus Timing Parameter Start of Frame to IRDEN Low (active) Start of Frame to IRENA Low (active) BCLKIO to IRDAT valid (Synchronous mode) ...
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... BSC L 0.026 0.037 0.65 L 0.077 1.95 REF 1 θ 0° 7° 0° θ 5° 16° 5° 3 Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater P/N LXT915QC Max 3.30 0.025 3.05 0.45 18.15 14.00 18.15 14.10 BSC 0.95 REF 7° 16° ...
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... Intel representative. For general information, see http://www.intel.com/technology/silicon/leadfree.htm. Figure 10. Sample HQFP Package – Intel Pin 1 Figure 11 shows a sample Pb-free RoHS-compliant HQFP package for the LXT915 Repeater. Figure 11. Sample Pb-Free (RoHS-Compliant) HQFP Package – Intel Pin 1 30 ® SLXT915QC Repeater LXT915QC B3 ...
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... Ordering Information Table 20 lists the LXT915 product ordering information. information matrix. Table 20. Product Information Intel Number SLXT915QC.B3 EGLXT915QC.B3 Datasheet ® Intel LXT915 Simple Quad Ethernet Repeater Figure 12 Revision Package Type Pin Count B3 HQFP B3 HQFP provides the ordering RoHS Compliant 64 No ...
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... B = BGA C = CBGA E = TBGA K = HSBGA (BGA with heat slug Product Code xxxxx = 3-5 Digit alphanumeric IXA Product Prefix LXT = PHY layer device IXE = Switching engine IXF = Formatting device (MAC/Framer) IXP = Network processor Intel Package Designator Pb-Free Package Leaded WB HQFP HB WJ LQFP DJ BJ ...