Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 145

• Manufacturer Part Number: Z16M1720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z16M1720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16. Sample DMA Program
UM008101-0601
WR0 sets DMA to
receive block length,
Port A starting
address, and
temporarily sets Port
B as source.
Port A address
(lower)
Port A address
(upper)
Block length (lower)
Block length (upper)
WR1 defines Port A
as memory with
fixed incrementing
address
WR4 defines Port A
as memory with
fixed incrementing
address
completed before the next
SEQUENCE
Table 16 illustrates a program to transfer data from memory (Port A) to a
peripheral device (Port B). In this example, the Port A memory starting
address is
number of data bytes to be transferred is
ified by the block length). The table of DMA commands may be stored in
consecutive memory locations and transferred to the DMA with an output
instruction such as the Z80 CPU’s OTIR instruction.
D7
0
0
0
0
0
0
0
Follows
Follows
Follows
Timing
Timing
Length
Upper
Block
1050H
No
No
command.
1
1
0
0
0
0
0
Address
Address
Follows
Change
Length
and the Port B peripheral fixed address is
Upper
Block
Fixed
D5
1
0
0
0
0
0
1
s
Address
Follows
Address
Change
READ STATUS BYTE
Port A
Upper
D4
1
1
1
0
1
1
0
s
Address
Follows
Memor
Port A
Upper
Port is
Port is
I/O
D3
1
0
0
0
0
0
y
1
1001H
Leading
Address
Tempor
ary for
B→A
D2
B
0
0
0
0
0
1
0
or
bytes (one more than spec-
<   % 2 7 2 G T K R J G T C N U
INITIATE READ
Direct Memory Access
Transfer. No
D1
0
0
0
0
0
1
Search
0
7 U G T / C P W C N
05H
D0
0
0
0
0
0
0
. The
HEX
50
10
00
10
14
28